US2016043221A1PendingUtilityA1
Semiconductor device and manufacturing method thereof
Est. expiryMay 30, 2031(~4.8 yrs left)· nominal 20-yr term from priority
Inventors:Yuichi Hirano
H10P 50/283H10P 50/73H10P 14/69433H10P 14/69215H10P 14/414H10D 30/0212H10D 84/0184H10D 84/0181H10D 84/0167H10D 84/038H10D 64/037H10D 64/015H10D 30/694H10D 30/601H10D 30/0413H10D 30/0227H10D 30/69H10D 30/792H01L 27/11573H01L 27/11568H01L 29/7843H10B 43/30H10B 43/40
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Claims
Abstract
A semiconductor device includes a semiconductor substrate having a main surface, a MONOS-type memory cell formed over the main surface and having a channel, an n-channel transistor formed over the main surface, and a p-channel transistor formed over the man surface. Nitride films are formed in a manner to contact the top surfaces of the MONOS-type memory cell, the n-channel transistor, and the p-channel transistor. The nitride films apply stress to the channels of the MONOS-type memory cell, the n-channel transistor, and the p-channel transistor.
Claims
exact text as granted — not AI-modified1 . (canceled)
2 . A semiconductor device including an n-channel transistor and a p-channel transistor comprising:
a first gate electrode of the n-channel transistor and a second gate electrode of the p-channel transistor formed over a semiconductor substrate; a first side wall of silicon oxide film formed over a side wall of the first gate electrode; a second side wall of silicon oxide film formed over a side wall of the second gate electrode; a third side wall of silicon nitride film formed over the side wall of the first gate electrode through the first side wall; a first silicon nitride film formed over the side wall of the first gate electrode through the first side wall and the third side wall; and a second silicon nitride film formed over the side wall of the second gate electrode through the second side wall.
3 . A semiconductor device according to the claim 2 , further comprising:
a silicon oxide film formed over the first silicon nitride used for an etching stopper.
4 . A semiconductor device according to the claim 2 ,
wherein the second side wall extends along the side wall of the second gate electrode and the semiconductor substrate continuously.
5 . A semiconductor device according to the claim 2 ,
wherein the second silicon nitride film contacts the second side wall.
6 . A semiconductor device according to the claim 2 ,
wherein the first silicon nitride film is for supplying a compressive stress into a channel region of the n-channel transistor, and wherein the second silicon nitride film is for supplying a compressive stress into a channel region of the p-channel transistor.
7 . A semiconductor device including a first transistor and a first transistor comprising:
a first gate electrode of the first transistor and a second gate electrode of the second transistor formed over a semiconductor substrate; a first side wall of silicon oxide film formed over a side wall of the first gate electrode; a second side wall of silicon oxide film formed over a side wall of the second gate electrode; a third side wall of silicon nitride film formed over the side wall of the first gate electrode through the first side wall; a first silicon nitride film formed over the side wall of the first gate electrode through the first side wall and the third side wall; and a second silicon nitride film formed over the side wall of the second gate electrode through the second side wall.
8 . A semiconductor device according to the claim 7 , further comprising:
a silicon oxide film formed over the first silicon nitride used for an etching stopper.
9 . A semiconductor device according to the claim 7 ,
wherein the second side wall extends along the side wall of the second gate electrode and the semiconductor substrate continuously.
10 . A semiconductor device according to the claim 7 ,
wherein the second silicon nitride film contacts the second side wall.
11 . A semiconductor device according to the claim 7 ,
wherein the first silicon nitride film is for supplying a compressive stress into a channel region of the first transistor, and wherein the second silicon nitride film is for supplying a compressive stress into a channel region of the second transistor.Join the waitlist — get patent alerts
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