Semiconductor device

Abstract

A first lower insulating film (LIL 1 ) is formed on the bottom surface and a lower portion of the side surface of a first concave portion (gate trench) and is thicker than a gate insulating film (GIF). An upper end of LIL 1 is connected to a lower end of the GIF. A second lower insulating film is formed on the bottom surface and a lower portion of the side surface of a second concave portion (termination trench). An upper insulating film (UIF) is formed at an upper portion of the side surface of the second concave portion and a lower end is connected to an upper end of LIL 2 . The depth of the second concave portion is ≧90% and ≦110% of the depth of the first concave portion. The thickness of LIL 2 is ≧95% and ≦105% of the thickness of LIL 1 . The UIF is thicker than the GIF.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a drain layer of a first conductivity type formed over a semiconductor substrate;   a low-concentration impurity layer of the first conductivity type which is formed over the drain layer and has lower impurity concentration than the drain layer;   a base layer of a second conductivity type being opposite to the first conductivity type which is located over the low-concentration impurity layer;   a first concave portion formed in the base layer and the low-concentration impurity layer such that a bottom surface of the first concave portion is located at the low-concentration impurity layer;   a gate insulating film formed over a side surface of the first concave portion;   a first lower insulating film formed over the bottom surface and the side surface of the first concave portion such that the first lower insulating film has larger thickness than the gate insulating film and is connected to the gate insulating film;   a gate electrode embedded in the first concave portion;   a source layer of the first conductivity type formed in the base layer and located next to the first concave portion;   a contact hole formed in the source layer and the base layer such that a bottom surface of the contact hole is located at the base layer and a side surface of the contact hole is connected to the source layer and the base layer;   a plug embedded in the contact hole;   a second concave portion located between the first concave portion and an end of the semiconductor substrate in a planar view and formed in the base layer and the low-concentration impurity layer such that a bottom surface of the second concave portion is located at the low-concentration impurity layer;   a upper insulating film formed over a side surface of the second concave portion;   a second lower insulating film formed over the bottom surface and the side surface of the second concave portion such that the second lower insulating film has larger thickness than the upper insulating film and is connected to the upper insulating film;   an embedded electrode embedded in the second concave portion,   wherein a depth of the second concave portion is greater than or equal to 90% and less than or equal to 110% of a depth of the first concave portion,   a thickness of the second lower insulating film is greater than or equal to 95% and less than or equal to 105% of a thickness of the first lower insulating film,   the upper insulating film is thicker than the gate insulating film, and   the upper insulating film is greater than or equal to 95% and less than or equal to 105% of a thickness of the second lower insulating film.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein a plurality of first concave portions is formed parallel to each other in a planar view,
 the gate insulating film, the first lower insulating film and the gate electrode are formed in each of the plurality of first concave portions, and   a distance between the plurality of first concave portions is equal to a distance between the first concave portion closest to the second concave portion and the second concave portion.