Self-aligned bipolar junction transistor having self-planarizing isolation raised base structures

Abstract

A collector region is formed between insulating shallow trench isolation regions within a substrate. A base material is epitaxially grown on the collector region and the shallow trench isolation regions. The base material forms a base region on the collector region and extrinsic base regions on the shallow trench isolation regions. Further, a sacrificial emitter structure is patterned on the base region and sidewall spacers are formed on the sacrificial emitter structure. Planar raised base structures are epitaxially grown on the base region and the extrinsic base regions, and the upper layer of the raised base structures is oxidized. The sacrificial emitter structure is removed to leave an open space between the sidewall spacers and an emitter is formed within the open space between the sidewall spacers. The upper layer of the raised base structures comprises a planar insulator electrically insulating the emitter from the raised base structures.

1 . An integrated circuit structure comprising:
 a substrate;   insulator regions within said substrate;   a collector region within said substrate between said insulator regions;   an epitaxial base material on said collector region and said insulator regions, said epitaxial base material comprising a base region on said collector region and comprising extrinsic base regions on said insulator regions;   an emitter on said base region, said emitter having sidewalls perpendicular to a bottom surface of said emitter that contacts said base region;   sidewall spacers on said sidewalls of said emitter; and   epitaxial raised base structures on said base region and said extrinsic base regions,   said epitaxial raised base structures having an upper layer opposite a location where said epitaxial raised base structures contact said base region and said extrinsic base regions, and   said upper layer of said epitaxial raised base structures comprising an insulator electrically insulating said emitter from said epitaxial raised base structures.   
     
     
         2 . The integrated circuit structure according to  claim 1 , said epitaxial raised base structures comprising:
 a first layer on said base region and said extrinsic base regions; and   said upper layer on said first layer of said epitaxial raised base structures,   said first layer of said epitaxial raised base structures having a first concentration of doping material,   said upper layer of said epitaxial raised base structures having a second concentration of said doping material, and   said second concentration of said doping material being higher than said first concentration of said doping material.   
     
     
         3 . The integrated circuit structure according to  claim 1 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers extending a first distance from said upper surface of said base region,   said upper layer of said epitaxial raised base structures extending a second distance from said upper surface of said base region, and   said second distance being less than said first distance.   
     
     
         4 . The integrated circuit structure according to  claim 1 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers having distal ends extending a first distance from said upper surface of said base region,   said emitter extending a second distance from said upper surface of said base region,   said second distance being greater than said first distance, and   said emitter covering said distal ends of said sidewall spacers and contacting said upper layer of said epitaxial raised base structures.   
     
     
         5 . The integrated circuit structure according to  claim 1 , further comprising raised base limiting structures on distal portions of said extrinsic base regions that are distal to said base region. 
     
     
         6 . The integrated circuit structure according to  claim 5 , said epitaxial raised base structures extending on said extrinsic base regions in a direction from said base region only to where said raised base limiting structures are positioned on said distal portions of said extrinsic base regions, and
 said raised base limiting structures being positioned on said distal portions of said extrinsic base regions to limit a size of said raised base structures.   
     
     
         7 . An integrated circuit structure comprising:
 a substrate;   insulator regions within said substrate;   a collector region within said substrate between said insulator regions;   an epitaxial base material on said collector region and said insulator regions, said epitaxial base material comprising a base region on said collector region and comprising extrinsic base regions on said insulator regions;   an emitter on said base region, said emitter having sidewalls perpendicular to a bottom surface of said emitter that contacts said base region;   sidewall spacers on said sidewalls of said emitter; and   epitaxial raised base structures on said base region and said extrinsic base regions, said epitaxial raised base structures comprising:
 a first layer with a first concentration of doping material on said base region and said extrinsic base regions; and 
 an upper layer with a second concentration of said doping material on said first layer, said second concentration of said doping material being higher than said first concentration and said upper layer being oxidized and being opposite a location where said epitaxial raised base structures contact said base region and said extrinsic base regions. 
   
     
     
         8 . The integrated circuit structure according to  claim 7 , said upper layer being oxidized so as to electrically insulate said emitter from said epitaxial raised base structures. 
     
     
         9 . The integrated circuit structure according to  claim 7 , said epitaxial raised base structures being planar. 
     
     
         10 . The integrated circuit structure according to  claim 7 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers extending a first distance from said upper surface of said base region,   said upper layer of said epitaxial raised base structures extending a second distance from said upper surface of said base region, and   said second distance being less than said first distance.   
     
     
         11 . The integrated circuit structure according to  claim 7 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers having distal ends extending a first distance from said upper surface of said base region,   said emitter extending a second distance from said upper surface of said base region,   said second distance being greater than said first distance, and   said emitter covering said distal ends of said sidewall spacers and contacting said upper layer of said epitaxial raised base structures.   
     
     
         12 . The integrated circuit structure according to  claim 7 , further comprising raised base limiting structures on distal portions of said extrinsic base regions that are distal to said base region. 
     
     
         13 . The integrated circuit structure according to  claim 12 , said epitaxial raised base structures extending on said extrinsic base regions in a direction from said base region only to where said raised base limiting structures are positioned on said distal portions of said extrinsic base regions, and
 said raised base limiting structures being positioned on said distal portions of said extrinsic base regions to limit a size of said raised base structures.   
     
     
         14 . An integrated circuit structure comprising:
 a substrate;   insulator regions within said substrate;   a collector region within said substrate between said insulator regions;   an epitaxial base material on said collector region and said insulator regions, said epitaxial base material comprising a base region on said collector region and comprising extrinsic base regions on said insulator regions;   an emitter on said base region, said emitter having sidewalls perpendicular to a bottom surface of said emitter that contacts said base region;   sidewall spacers on said sidewalls of said emitter; and   epitaxial planar raised base structures on said base region and said extrinsic base regions, said epitaxial planar raised base structures comprising:
 a first layer with a first concentration of doping material on said base region and said extrinsic base regions; and 
 an upper layer with a second concentration of said doping material on said first layer, said second concentration of said doping material being higher than said first concentration and said upper layer being oxidized so as to electrically insulate said emitter from said raised base structures and and being opposite a location where said epitaxial planar raised base structures contact said base region and said extrinsic base regions. 
   
     
     
         15 . The integrated circuit structure according to  claim 14 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers extending a first distance from said upper surface of said base region,   said upper layer of said epitaxial raised base structures extending a second distance from said upper surface of said base region, and   said second distance being less than said first distance.   
     
     
         16 . The integrated circuit structure according to  claim 14 , said base region having an upper surface connected to said sidewall spacers by an oxide,
 said sidewall spacers having distal ends extending a first distance from said upper surface of said base region,   said emitter extending a second distance from said upper surface of said base region,   said second distance being greater than said first distance, and   said emitter covering said distal ends of said sidewall spacers and contacting said upper layer of said epitaxial planar raised base structures.   
     
     
         17 . The integrated circuit structure according to  claim 14 , further comprising raised base limiting structures on distal portions of said extrinsic base regions that are distal to said base region. 
     
     
         18 . The integrated circuit structure according to  claim 17 , said epitaxial raised base structures extending on said extrinsic base regions in a direction from said base region only to where said raised base limiting structures are positioned on said distal portions of said extrinsic base regions, and
 said raised base limiting structures being positioned on said distal portions of said extrinsic base regions to limit a size of said raised base structures.