US2016043118A1PendingUtilityA1

Semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: Jun 26, 2012Filed: Oct 16, 2015Published: Feb 11, 2016
Est. expiryJun 26, 2032(~5.9 yrs left)· nominal 20-yr term from priority
H10W 76/48H10F 77/14H10F 39/8037H10F 39/811H10F 39/807H10F 39/028H10F 39/18H10F 39/8033H01L 27/1463H01L 27/1461H01L 27/14612H01L 27/14636
49
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Claims

Abstract

Provided is a semiconductor device having good properties. Particularly, the semiconductor device is provided which can improve imaging properties. The semiconductor device (CMOS image sensor) includes a plurality of pixels, each having a photodiode PD for generating a charge by receiving light, and a transfer transistor TX for transferring the charge generated by the photodiode PD. The semiconductor device further includes an active region AcTP with the photodiode, and an active region AcG located on an upper side of the region AcTP in the planar direction and having a contact Pg to which a ground potential is applied. A gettering region GET is disposed in the active region AcG.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a semiconductor substrate having a main surface, the main surface including a first area and a second area, the first area and the second area being respectively surrounded by an element isolation region made of an insulator in a plan view;   a first semiconductor region of a first conductive type formed in the semiconductor substrate, the first semiconductor region extending at both the first area and the second area;   a gate electrode formed on the main surface of the semiconductor substrate at the first area;   a second semiconductor region of a second conductive type opposite to the first conductive type formed in the first semiconductor region at the first area to form a PN junction with the first semiconductor region, the second semiconductor region being disposed at one side of the gate electrode in the plan view;   a third semiconductor region of the second conductive type formed in the first semiconductor region at the first area and being disposed at the other side of the gate electrode in the plan view;   a gettering region formed in the first semiconductor region at the second area; and   a contact plug formed on the gettering region and electrically coupled to the first semiconductor region,   wherein a transfer transistor for transferring a charge generated by a photo diode including the PN junction is comprised of the second semiconductor region, the gate and the third semiconductor region,   wherein the gettering region is a impurity diffused region formed in the main surface of the semiconductor substrate, and   wherein a ground potential is applied to the contact plug.   
     
     
         2 . The semiconductor device according to  claim 1 , further comprising a first silicide layer formed on the getting region,
 wherein the contact plug is formed on the getting region via the first silicide layer.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein the first silicide is nickel silicide film.   
     
     
         4 . The semiconductor device according to  claim 2 , further comprising a second silicide layer formed on the third semiconductor region,
 wherein the second silicide layer is formed of a same layer as that of the first silicide layer.   
     
     
         5 . The semiconductor device according to  claim 1 ;
 wherein the gettering region includes carbon as impurity.   
     
     
         6 . The semiconductor device according to  claim 1 ;
 wherein the gettering region further includes boron as impurity.   
     
     
         7 . The semiconductor device according to  claim 2 ,
 wherein the gettering region is provided to be in contact with a lower surface of the first silicide layer, and   wherein the contact plug is provided to be in contact with an upper surface of the first silicide layer.   
     
     
         8 . The semiconductor device according to  claim 1 ,
 wherein the gettering region is located in a depth of 100 nm or less from a surface of the second active region   
     
     
         9 . The semiconductor device according to  claim 5 ,
 wherein a carbon content of the gettering region is 1×10 19 /cm 3  or more but 1×10 21 /cm 3  or less, and   wherein an atomic percentage of carbon replaced by a Si crystal lattice of the gettering region is 0.1% or more but 1.5% or less.   
     
     
         10 . The semiconductor device according to  claim 1 , wherein the element isolation region is a LOCOS or an STI.

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