US2016043041A1PendingUtilityA1

Semiconductor packages and methods of packaging semiconductor devices

Assignee: UTAC HEADQUARTERS PTE LTDPriority: Mar 14, 2013Filed: Oct 14, 2015Published: Feb 11, 2016
Est. expiryMar 14, 2033(~6.6 yrs left)· nominal 20-yr term from priority
H05K 3/4007H05K 3/0023H05K 3/107H05K 3/3452H05K 3/341H05K 3/0041H10W 90/754H10W 90/734H10W 90/724H10W 74/117H10W 72/07207H10W 72/884H10W 72/357H10W 72/287H10W 72/072H10W 70/698H10W 90/701H10W 90/401H10W 74/131H10W 74/129H10W 74/016H10W 74/15H10W 74/012H10W 70/6875H10W 70/635H10W 70/611H10W 70/421H10W 70/411H10W 70/093H10W 70/65H10W 70/042H10W 70/041H10W 70/05H10W 20/063H10W 20/057H10W 42/121H01L 23/562H01L 21/76885H01L 23/3114H01L 23/49503H01L 21/76879H01L 21/565H01L 21/4825H01L 23/49541H01L 21/4828
45
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

Semiconductor packages and methods for forming a semiconductor package are presented. The method includes providing a package substrate having first and second major surfaces. The package substrate dudes at least one substrate layer having at least one cavity. Interconnect structure is formed. At least one conductive stud is formed within the cavity and a conductive trace and a connection pad are formed over the first major surface of the package substrate and are coupled to top surface of the conductive stud. A package pad is formed and is directly coupled to the conductive stud. A die having conductive contacts on its first or second surface is provided. The conductive contacts of the die are electrically coupled to the interconnect structure. A cap is formed over the package substrate to encapsulate the die.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method for forming a semiconductor package comprising:
 providing a conductive carrier having first and second major planar surfaces;   providing a package substrate having first and second major surfaces, wherein the package substrate comprises at least one substrate layer having at least one cavity provide over the conductive carrier;   forming interconnect structure, wherein forming the interconnect structure comprises
 forming at least one conductive stud within the at least one cavity, 
 forming a conductive trace and a connection pad over the package substrate and coupled to top surface of the conductive stud, and 
 forming a package pad, wherein the package pad is directly coupled to the conductive stud; 
   providing a die having conductive contacts on its first or second surface, wherein the conductive contacts of the die are electrically coupled to the interconnect structure; and   forming a cap over the package substrate to encapsulate the die.   
     
     
         2 . The method of  claim 1  wherein the conductive stud, conductive trace and connection pad are formed by a plating process. 
     
     
         3 . The method of  claim 1  comprising forming a protective layer over the first major surface of the package substrate, wherein the protective layer comprises a plurality of openings which define locations where the conductive contacts of the die are disposed. 
     
     
         4 . The method of  claim 1  wherein:
 the substrate layer is a first substrate layer which is in direct contact with the first major planar surface of the conductive carrier; and 
 wherein the at least one cavity of the first substrate layer is a first type cavity which defines location where the conductive stud is to be formed. 
 
     
     
         5 . The method of  claim 4  wherein the package pad is formed by:
 providing a mask having at least one opening over the second major planar surface of the conductive carrier; and 
 removing a portion of the conductive carrier exposed by the opening of the mask, wherein the remaining portion of the conductive carrier which is directly below the conductive stud defines the package pad, and at least a portion of the package pad is protruded outside of the second major surface of the package substrate defined by bottom surface of the first substrate layer. 
 
     
     
         6 . The method of  claim 5  comprising forming at least one package contact, wherein the package contact is coupled to the protruded portion of the package pad. 
     
     
         7 . The method of  claim 1  wherein:
 the substrate layer is a second substrate layer and the at least one cavity of the second substrate layer is a first type cavity which defines a location where the conductive stud is to be formed; and wherein providing the package substrate further comprises 
 forming a first substrate layer having first and second surfaces in between the second substrate layer and the conductive carrier, wherein the first substrate layer comprises at least one second type cavity which defines location where the package pad is to be formed. 
 
     
     
         8 . The method of  claim 7  wherein:
 the package pad comprises at least first and second conductive layers; and 
 the first and second conductive layers are formed in the second type cavity by a plating process. 
 
     
     
         9 . The method of  claim 8  wherein the first type cavity is disposed over and anywhere within the package pad. 
     
     
         10 . The method of  claim 8  comprising removing the conductive carrier after forming the cap, wherein bottom surface of the package pad is substantially coplanar with the second surface of the first substrate layer. 
     
     
         11 . The method of  claim 10  comprising forming at least one package contact, wherein the package contact is coupled to a bottom surface of the first conductive layer of the package pad. 
     
     
         12 . The method of  claim 10  comprising forming an insulating layer over the second surface of the first substrate layer, wherein the insulating layer comprises at least one third type cavity having a width smaller than a width of the package pad, the third type cavity exposes a portion of the bottom surface of the package pad. 
     
     
         13 . The method of  claim 12  comprising forming at least one package contact, wherein a portion of top portion of the package contact is formed within the third type cavity and is coupled to the package pad. 
     
     
         14 . The method of  claim 7  comprising:
 processing the first major planar surface of the conductive carrier to form a topography having at least one protruded portion and at least one recess, the protruded portion defines location over which the package pad is formed and the recess defines location over which no package pad is firmed; and wherein 
 the first substrate layer is formed over the first major surface of the processed conductive carrier and fills the recess and the first substrate layer is processed to form the at least one second type cavity and the second type cavity is disposed over the protruded portion of the conductive carrier. 
 
     
     
         15 . The method of  claim 14  wherein:
 the package pad comprises at least first and second conductive layers; and 
 the first and second conductive layers are formed in the at least one second type cavity by a plating process. 
 
     
     
         16 . The method of  claim 14  comprising removing the processed conductive carrier after forming the cap, wherein bottom surface of the package pad is above the second surface of the first substrate layer and sides of the package pad are completely surrounded by the first substrate layer. 
     
     
         17 . A semiconductor package comprising:
 a package substrate having first and second major surfaces, wherein the package substrate comprises at least one substrate layer having at least one cavity which defines location where a conductive stud is disposed;   interconnect structure, wherein the interconnect structure comprises
 at least one conductive stud disposed within the at least one cavity, 
 a conductive trace and a connection pad disposed over the first major surface of the package substrate and coupled to top surface of the conductive stud, and 
 a package pad, wherein the package pad is directly coupled to the conductive stud and at least a portion of the package pad is protruded outside of the second major surface of the package substrate defined by a bottom surface of the substrate layer; 
   at least one package contact, wherein the package contact is coupled to the protruded portion of the package pad;   a die having conductive contacts on its first or second surface, wherein the conductive contacts of the die are electrically coupled to the interconnect structure; and   a cap over the package substrate to encapsulate the die.   
     
     
         18 . A semiconductor package comprising:
 a package substrate having first and second major surfaces, wherein the package substrate comprises
 a first substrate layer having first and second surfaces, wherein the first substrate layer comprises at least one first type cavity which defines location where a package pad is disposed, and 
 a second substrate layer having first and second surfaces, wherein the second substrate layer comprises at least one second type cavity which defines location where a conductive stud is disposed, and 
   interconnect structure, wherein the interconnect structure comprises
 at least one conductive stud disposed within the at least one second type cavity, 
 a conductive trace and a connection pad disposed over the first major surface of the package substrate and coupled to top surface of the conductive stud, and 
 at least one package pad disposed within the at least one first type cavity and is directly coupled to the conductive stud; 
   a die having conductive contacts on its first or second surface, wherein the conductive contacts of the die are electrically coupled to the interconnect structure; and   a cap over the package substrate to encapsulate the die.   
     
     
         19 . The semiconductor package of  claim 18  wherein:
 the package pad comprises at least first and second conductive layers; and 
 the second type cavity is disposed over and anywhere within the package pad. 
 
     
     
         20 . The semiconductor package of  claim 19  comprising an insulating layer disposed over the second surface of the first substrate layer, wherein the insulating layer comprises at least one third type cavity having a width smaller than a width of the package pad, the third type cavity exposes a portion of a bottom surface of the package pad.

Join the waitlist — get patent alerts

Track US2016043041A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.