Chip integration module, chip package structure, and chip integration method
Abstract
The present invention provides a chip integration module, including a die, a passive device, and a connecting piece, where the die is provided with a die bonding portion, the passive device is provided with a passive device bonding portion, the die bonding portion of the die and the passive device bonding portion of the passive device are disposed opposite to each other, and the connecting piece is disposed between the die bonding portion and the passive device bonding portion and is connected to the die bonding portion and the passive device bonding portion. The chip integration module of the present invention achieves easy integration and has low costs. Moreover, a path connecting the die to the passive device becomes shorter, which can improve performance of the passive device. The present invention further discloses a chip package structure and a chip integration method.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A chip integration module, comprising a die, a passive device, and a connecting piece, wherein the die is provided with a die bonding portion, the passive device is provided with a passive device bonding portion, the die bonding portion of the die and the passive device bonding portion of the passive device are disposed opposite to each other, and the connecting piece is disposed between the die bonding portion and the passive device bonding portion, and is connected to the die bonding portion and the passive device bonding portion.
2 . The chip integration module according to claim 1 , wherein the die bonding portion of the die and the passive device bonding portion of the passive device are made of metal.
3 . The chip integration module according to claim 2 , wherein the connecting piece is made of any one of gold, silver, copper, titanium, nickel, and aluminum, or an alloy of any two or more of the foregoing metal.
4 . The chip integration module according to claim 3 , wherein the connecting piece is connected to the die bonding portion and the passive device bonding portion by means of ultrasonic welding or thermocompression bonding.
5 . The chip integration module according to claim 1 , wherein an integrated passive device or a discrete passive device is used as the passive device.
6 . The chip integration module according to claim 1 , wherein the connecting piece comprises a first connecting piece and a second connecting piece, the first connecting piece is connected to the die bonding portion of the die, the second connecting piece is connected to the passive device bonding portion of the passive device, and the first connecting piece and the second connecting piece are connected to each other.
7 . The chip integration module according to claim 1 , wherein the die is provided with a die surface, the die bonding portion is provided with a die bonding surface, and the die bonding surface is concave or convex with respect to or flush with the die surface.
8 . The chip integration module according to claim 1 , wherein the passive device is provided with a passive device surface, the passive device bonding portion is provided with a passive device bonding surface, and the passive device bonding surface is concave or convex with respect to or flush with the passive device surface.
9 . The chip integration module according to claim 1 , wherein the die bonding portion is formed on the die by means of sputtering or chemical vapor deposition.
10 . The chip integration module according to claim 1 , wherein the passive device bonding portion is formed on the passive device by means of electroplating, sputtering, or chemical vapor deposition.
11 . The chip integration module according to claim 1 , wherein a protective layer is provided on the surface of the connecting piece, and the protective layer at least covers a part of the surface of the connecting piece.
12 . The chip integration module according to claim 11 , wherein the protective layer is made of any one of gold, tin, copper, nickel, and palladium, or an alloy of any two or more of the foregoing metal.
13 . The chip integration module according to claim 12 , wherein the protective layer has an organic solderability preservative.
14 . The chip integration module according to claim 1 , wherein a gap is provided between the die and the passive device, and the gap between the die and the passive device is filled with a filling material.
15 . The chip integration module according to claim 14 , wherein a filling adhesive is used as the filling material.
16 . A chip package structure, comprising:
a base; a chip integration module, wherein the chip integration module is disposed on the base, the chip integration module comprises a die, a passive device, and a connecting piece, wherein the die is provided with a die bonding portion, the passive device is provided with a passive device bonding portion, the die bonding portion of the die and the passive device bonding portion of the passive device are disposed opposite to each other, and the connecting piece is disposed between the die bonding portion and the passive device bonding portion, and is connected to the die bonding portion and the passive device bonding portion.
17 . A chip integration method, comprising the following steps:
providing a die and a passive device, wherein the die is provided with a die bonding portion, and the passive device is provided with a passive device bonding portion; and disposing a connecting piece, wherein the connecting piece is connected to the die bonding portion and the passive device bonding portion, and the connecting piece is located between the die bonding portion and the passive device bonding portion.
18 . The chip integration method according to claim 17 , wherein the disposing a connecting piece further comprises the following steps:
forming the connecting piece on one of the die bonding portion and the passive device bonding portion; and connecting the connecting piece to the other of the die bonding portion and the passive device bonding portion.
19 . The chip integration method according to claim 18 , wherein the connecting piece is formed on one of the die bonding portion and the passive device bonding portion by means of wire bonding and cutting, and the connecting piece is connected to the other of the die bonding portion and the passive device bonding portion by means of ultrasonic welding or thermocompression bonding.
20 . The chip integration method according to claim 17 , wherein the connecting piece comprises a first connecting piece and a second connecting piece, and the disposing a connecting piece further comprises the following steps:
forming the first connecting piece of the connecting piece on the die bonding portion of the die; forming the second connecting piece of the connecting piece on the passive device bonding portion of the passive device; and connecting the first connecting piece to the second connecting piece.Join the waitlist — get patent alerts
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