US2016027810A1PendingUtilityA1

Semiconductor Device, Display Module, and Electronic Appliance

Assignee: SEMICONDUCTOR ENERGY LABPriority: Jul 24, 2014Filed: Jul 21, 2015Published: Jan 28, 2016
Est. expiryJul 24, 2034(~8 yrs left)· nominal 20-yr term from priority
Inventors:Atsushi Umezaki
G09G 2310/0286G06F 3/041G09G 2310/0267G11C 19/28G09G 3/2092G11C 27/04G09G 2310/08H10D 89/10H10D 86/423H10D 84/0116H10D 84/038H10D 86/441H10D 30/6755H10D 86/481H10D 86/60H01L 27/124H01L 27/1225G09G 2300/0426G09G 3/20
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Claims

Abstract

The circuit includes a first transistor; a second transistor whose first terminal is connected to a gate of the first transistor for setting the potential of the gate of the first transistor to a level at which the first transistor is turned on; a third transistor for setting the potential of a gate of the second transistor to a level at which the second transistor is turned on and bringing the gate of the second transistor into a floating state; and a fourth transistor for setting the potential of the gate of the second transistor to a level at which the second transistor is turned off. With such a configuration, a potential difference between the gate and a source of the second transistor can be kept at a level higher than the threshold voltage of the second transistor, so that operation speed can be improved.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device comprising:
 a first transistor;   a second transistor;   a third transistor; and   a fourth transistor,   wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,   wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,   wherein one of a source and a drain of the second transistor is electrically connected to a third wiring,   wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor,   wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,   wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the second transistor,   wherein one of a source and a drain of the fourth transistor is electrically connected to a fifth wiring, and   the other of the source and the drain of the fourth transistor is electrically connected to the gate of the second transistor.   
     
     
         2 . A semiconductor device comprising:
 a first transistor;   a second transistor;   a third transistor; and   a fourth transistor,   wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,   wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,   wherein one of a source and a drain of the second transistor is electrically connected to a third wiring,   wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor,   wherein one of a source and a drain of the third transistor is electrically connected to the third wiring,   wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the second transistor,   wherein one of a source and a drain of the fourth transistor is electrically connected to a fourth wiring, and   wherein the other of the source and the drain of the fourth transistor is electrically connected to the gate of the second transistor.   
     
     
         3 . A semiconductor device comprising:
 a first transistor;   a second transistor;   a third transistor; and   a fourth transistor,   wherein one of a source and a drain of the first transistor is electrically connected to a first wiring,   wherein the other of the source and the drain of the first transistor is electrically connected to a second wiring,   wherein one of a source and a drain of the second transistor is electrically connected to a third wiring,   wherein the other of the source and the drain of the second transistor is electrically connected to a gate of the first transistor,   wherein one of a source and a drain of the third transistor is electrically connected to a fourth wiring,   wherein the other of the source and the drain of the third transistor is electrically connected to a gate of the second transistor,   wherein one of a source and a drain of the fourth transistor is electrically connected to the third wiring or the fourth wiring, and   wherein the other of the source and the drain of the fourth transistor is electrically connected to the gate of the second transistor.   
     
     
         4 . The semiconductor device according to  claim 1 , wherein a gate of the fourth transistor is connected to the first wiring. 
     
     
         5 . The semiconductor device according to  claim 2 , wherein a gate of the fourth transistor is connected to the first wiring. 
     
     
         6 . The semiconductor device according to  claim 3 , wherein a gate of the fourth transistor is connected to the first wiring. 
     
     
         7 . The semiconductor device according to  claim 1 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes an oxide semiconductor in a channel formation region. 
     
     
         8 . The semiconductor device according to  claim 2 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes an oxide semiconductor in a channel formation region. 
     
     
         9 . The semiconductor device according to  claim 3 , wherein each of the first transistor, the second transistor, the third transistor, and the fourth transistor includes an oxide semiconductor in a channel formation region. 
     
     
         10 . A display module comprising:
 the semiconductor device according to  claim 1 ; and   an FPC.   
     
     
         11 . A display module comprising:
 the semiconductor device according to  claim 2 ; and   an FPC.   
     
     
         12 . A display module comprising:
 the semiconductor device according to  claim 3 ; and   an FPC.   
     
     
         13 . An electronic appliance comprising:
 the display module according to  claim 10 ; and   an antenna, an operation button, or, a speaker.   
     
     
         14 . An electronic appliance comprising:
 the display module according to  claim 11 ; and   an antenna, an operation button, or, a speaker.   
     
     
         15 . An electronic appliance comprising:
 the display module according to  claim 12 ; and   an antenna, an operation button, or, a speaker.

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