Establishing a thermal profile across a semiconductor chip

Abstract

Embodiments of the present invention disclose a semiconductor structure and method for establishing a thermal profile across a semiconductor chip. In certain embodiments, the semiconductor structure comprises a through-silicon via formed in a first semiconductor chip having thermal control circuitry, wherein the through-silicon via is formed in a manner to be thermally coupled to the thermal control circuitry and a region of a second semiconductor chip, and wherein the through-silicon via conducts heat from the thermal control circuitry to the region. In other embodiments, the method comprises forming a through-silicon via in a first semiconductor chip having thermal control circuitry. The method also comprises forming the through-silicon via in a manner to be thermally coupled to the thermal control circuitry and a region of a second semiconductor chip, wherein the through-silicon via conducts heat from the thermal control circuitry to the region.

1 . A method comprising:
 forming a through-silicon via in a first semiconductor chip having thermal control circuitry; and   forming the through-silicon via in a manner to be thermally coupled to the thermal control circuitry and a region of a second semiconductor chip, wherein the through-silicon via conducts heat from the thermal control circuitry to the region.   
     
     
         2 . The method of  claim 1 , the first semiconductor chip being a heater semiconductor chip. 
     
     
         3 . The method of  claim 1 , the second semiconductor chip being a functional semiconductor chip. 
     
     
         4 . The method of  claim 1 , the thermal control circuitry being formed so as to generate a predetermined thermal output that establishes a predetermined thermal profile in the second semiconductor chip. 
     
     
         5 . The method of  claim 1 , the thermal control circuitry being a resistor. 
     
     
         6 . The method of  claim 1 , the through-silicon via being one of a plurality of through silicon vias that are arranged in an array in the first semiconductor chip. 
     
     
         7 . The method of  claim 1 , the second semiconductor chip comprising a sensor thermally coupled to the region and electronically coupled to the thermal control circuitry. 
     
     
         8 . The method of  claim 1 , further comprising
 applying a voltage to the thermal control circuitry to increase a temperature of at least a portion of the region.   
     
     
         9 - 10 . (canceled) 
     
     
         11 . A method comprising:
 forming a first semiconductor chip comprising:
 a first substrate; 
 a first device and a second device on the first substrate, the second device selectively controlling the first device such that the first device generates a predetermined amount of heat; 
 a dielectric layer on the first device and the second device; and, 
 a conductor extending vertically through the dielectric layer to the first device; 
   forming a second semiconductor chip comprising:
 a second substrate having a first surface and a second surface opposite the first surface; 
 a metal layer above the second surface; and, 
 a via extending vertically through the second substrate from the metal layer to the first surface; and, 
   joining the first semiconductor chip and the second semiconductor chip by connecting the via to the conductor such that the metal layer, the via, the conductor and the first device are vertically aligned and thermally coupled and such that heat generated by the first device is conducted through the conductor and the via to the metal layer.   
     
     
         12 . The method of  claim 11 , the second semiconductor chip further being formed so as to comprise a third device on the second surface of the second substrate, the third device determining a local temperature on the second semiconductor chip and being in communication with the second device, the second device selectively controlling the first device based on the local temperature. 
     
     
         13 . The method of  claim 11 , the first semiconductor chip being a heater semiconductor chip and the second semiconductor chip being a functional semiconductor chip. 
     
     
         14 . The method of  claim 11 , the conductor comprising a thermal probe. 
     
     
         15 . The method of  claim 11 , the second device selectively controlling the first device so that the first device generates the predetermined amount of heat so as to establish a predetermined thermal profile in the second semiconductor chip. 
     
     
         16 . The method of  claim 11 , the first device comprising resistor. 
     
     
         17 . The method of  claim 11 , the second device comprising a transistor. 
     
     
         18 . The method of  claim 11 , the second device monitoring an amount of heat present in a region of the second semiconductor chip and that selectively controls the first device based on the amount of heat present in the region. 
     
     
         19 . A method comprising:
 forming a first semiconductor chip comprising:
 a first substrate; 
 a resistor and a transistor on the first substrate, the transistor selectively controlling the resistor such that the resistor generates a predetermined amount of heat; 
 a dielectric layer on the resistor and the transistor; and, 
 a conductor extending vertically through the dielectric layer to the resistor; 
   forming a second semiconductor chip on the first semiconductor chip, the second semiconductor chip comprising:
 a second substrate having a first surface and a second surface opposite the first surface; 
 a metal layer above the second surface; and, 
 a via extending vertically through the second substrate from the metal layer to the first surface; and 
   joining the first semiconductor chip and the second semiconductor chip by connecting the via to the conductor such that the metal layer, the via, the conductor and the resistor are aligned vertically and thermally coupled and such that heat generated by the resistor is conducted through the conductor and the via to the metal layer.   
     
     
         20 . The method of  claim 19 , the second semiconductor chip further being formed so as to comprise a device on the second surface of the second substrate, the device determining a local temperature on the second semiconductor chip and being in communication with the transistor, the transistor selectively controlling the resistor based on the local temperature. 
     
     
         21 . The method of  claim 19 , the transistor selectively controlling the resistor so that the resistor generates the predetermined amount of heat so as to establish a predetermined thermal profile in the second semiconductor chip. 
     
     
         22 . The method of  claim 19 , the transistor monitoring an amount of heat present in a region of the second semiconductor chip and selectively controlling the resistor based on the amount of heat present in the region.