US2016020312A1PendingUtilityA1

Field effect transistor with channel core modified to reduce leakage current and method of fabrication

Assignee: RENESAS ELECTRONICS CORPPriority: Dec 28, 2012Filed: Sep 30, 2015Published: Jan 21, 2016
Est. expiryDec 28, 2032(~6.4 yrs left)· nominal 20-yr term from priority
H10D 64/666H10D 62/121H10D 62/115H10D 30/6741H10D 30/797H10D 30/47H10D 30/021H10D 30/014B82Y 10/00H10D 30/43H01L 29/66439H01L 29/775
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Claims

Abstract

A method of fabricating a semiconductor device with a reduced leakage method includes forming a channel structure on a substrate, the channel structure having a non-uniform composition, in a cross-sectional view, that comprises a core region and a peripheral region. An etch rate of the core region differs from an etch rate of the peripheral region. A source structure connected to one end of the channel structure is formed, and a drain structure connected to the other end of the channel structure is formed. At least a portion of the core region is electively etched and a gate structure to cover at least a portion of a surface of the channel structure, is formed, the gate structure comprising a film of insulation material and a gate electrode.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A method of fabricating a semiconductor device with a reduced leakage current, said method comprising:
 forming a channel structure on a substrate, the channel structure having a non-uniform composition, in a cross-sectional view, that comprises a core region and a peripheral region, an etch rate of the core region differing from an etch rate of the peripheral region;   forming a source structure connected to one end of the channel structure;   forming a drain structure connected to the other end of the channel structure;   selectively etching at least a portion of the core region; and   forming a gate structure to cover at least a portion of a surface of the channel structure, the gate structure comprising a film of insulation material and a gate electrode.   
     
     
         2 . The method of  claim 1 , wherein the selectively etching of the core region forms a cavity in the channel structure that provides a reduction of leakage current compared to a channel structure of uniform cross-sectional composition. 
     
     
         3 . The method of  claim 2 , further comprising filling the cavity with a dielectric material, the dielectric material providing a reduction of leakage current compared to a channel structure of uniform cross-sectional composition. 
     
     
         4 . The method of  claim 3 , wherein the dielectric material comprises SiO2. 
     
     
         5 . The method of  claim 3 , wherein the dielectric material comprises at least one of SiN, TiO2, HfO2, and ZrO2. 
     
     
         6 . The method of  claim 1 , further comprising forming openings respectively in the source and drain structures to thereby expose the core region of the channel structure for etching. 
     
     
         7 . The method of  claim 1 , wherein said film comprises a first film of insulation material, said semiconductor device further comprising:
 depositing a second film of insulation material over the source, drain, and gate structures;   forming openings in the second film respectively over the source, drain, and gate structures; and   depositing a conductive material that fills the openings to respectively contact the source, drain, and gate structures, to thereby serve as electrical connections to components of the semiconductor device.   
     
     
         8 . The method of  claim 7 , further comprising etching the conductive material to provide respective conductive lines interconnecting the openings to terminals that serve as electrical connections of the semiconductor device. 
     
     
         9 . The method of  claim 1 , wherein the channel structure interconnecting the source and drain structures comprises a plurality of interconnecting structures, each interconnecting structure having cores selectively etched. 
     
     
         10 . A semiconductor device, comprising:
 a channel structure formed on a substrate, the channel structure comprising a semiconductor material;   a gate structure covering at least a portion of a surface of the channel structure, the gate structure comprising a film of insulation material and a gate electrode;   a source structure connected to one end of the channel structure; and   a drain structure connected to the other end of the channel structure,   wherein the channel structure comprises a nanowire structure and has a non-uniform composition, in a cross-sectional view, that provides a reduction of a leakage current of the semiconductor device relative to a leakage current that would result from a uniform composition, the non-uniform composition of the channel structure comprising one of:   a nanowire-sized cavity formed longitudinally in the semiconductor material forming the channel structure, the cavity thereby providing the reduction of the leakage current; and.   a nanowire-sized center core comprising a dielectric material, the dielectric center core thereby providing the reduction of the leakage current.   
     
     
         11 . The semiconductor device of  claim 10 , wherein the dielectric material of the center core comprises one of: SiO2, SiN, TiO2, HfO2, and ZrO2.

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