Electronic device

Abstract

An improvement is achieved in the performance of an electronic device. A first semiconductor device and a second semiconductor device are mounted over the upper surface of a wiring board such that, e.g., in plan view, the orientation of the second semiconductor device intersects the orientation of the first semiconductor device. That is, the first semiconductor device is mounted over the upper surface of the wiring board such that a first emitter terminal and a first signal terminal are arranged along an x-direction in which the pair of shorter sides of the wiring board extend. On the other hand, the second semiconductor device is mounted over the upper surface of the wiring board such that a second emitter terminal and a second signal terminal are arranged along a y-direction in which the pair of longer sides of the wiring board extend.

1 - 18 . (canceled) 
     
     
         19 . An electronic device, including:
 a wiring board including a surface, a first electrode formed on the surface, a second electrode formed on the surface, a third electrode formed on the surface, a fourth electrode formed on the surface, a first external terminal electrically connected with the first electrode, a second external terminal electrically connected with the second electrode, a third external terminal electrically connected with the third electrode, and a fourth external terminal electrically connected with the fourth electrode; and   first, second, third and fourth semiconductor devices each including first and second semiconductor chips, a first external connection terminal electrically connected with the first and second semiconductor chips, a second external connection terminal electrically connected with the first and second semiconductor chips, a third external connection terminal electrically connected with the first semiconductor chip, and a sealing body sealing the first and second semiconductor chips,   wherein, in plan view, the surface of the wiring board includes a first side extending in a first direction, and a second side extending in the first direction and also facing the first side,   wherein, in plan view, the first external terminal is disposed closer to the first side than the second side,   wherein, in plan view, the second, third and fourth external terminals are disposed closer to the second side than the first side,   wherein, in plan view, the fourth external terminal is arranged between the second external terminal and the third external terminal,   wherein the first semiconductor chip includes a first insulated gate bipolar transistor having an emitter electrode, a collector electrode, and a gate electrode,   wherein the second semiconductor chip includes a diode having an anode electrode and a cathode electrode,   wherein the first external connection terminal is electrically connected with the emitter electrode of the first semiconductor chip and the anode electrode of the second semiconductor chip,   wherein the second external connection terminal is electrically connected with the collector electrode of the first semiconductor chip and the cathode electrode of the second semiconductor chip,   wherein the third external connection terminal is electrically connected with the gate electrode of the first semiconductor chip,   wherein the sealing body includes an upper surface, a lower surface opposite to the upper surface, a first side surface located between the upper surface and the lower surface, and a second side surface located between the upper surface and the lower surface and also facing the first side surface,   wherein the first external connection terminal is exposed from the first side surface of the sealing body,   wherein the second external connection terminal is exposed from the lower surface of the sealing body,   wherein the third external connection terminal is exposed from the second side surface of the sealing body,   wherein the first, second, third and fourth semiconductor devices are mounted on the wiring board such that the lower surface of the sealing body of each of the first, second, third and fourth semiconductor devices faces the surface of the wiring board,   wherein the first external connection terminal of the first semiconductor device and the first external connection terminal of the third semiconductor device are electrically connected with the fourth electrode of the wiring board,   wherein the second external connection terminal of the first semiconductor device and the first external connection terminal of the second semiconductor device are electrically connected with the second electrode of the wiring board,   wherein the second external connection terminal of the third semiconductor device and the first external connection terminal of the fourth semiconductor device are electrically connected with the third electrode of the wiring board,   wherein the second external connection terminal of the second semiconductor device and the second external connection terminal of the fourth semiconductor device are electrically connected with the first electrode of the wiring board, and   wherein the second and fourth semiconductor devices are mounted on the wiring board such that an orientation of each of the second and fourth semiconductor devices intersect an orientation of each of the first and third semiconductor devices in plan view.   
     
     
         20 . The electronic device according to  claim 19 ,
 wherein, in plan view, the first and fourth external terminals are located on a first virtual line extending in a second direction perpendicular to the first direction.   
     
     
         21 . The electronic device according to  claim 19 ,
 wherein the first and third semiconductor devices are mounted on the wiring board such that the first external connection terminal of the first semiconductor device and the first external connection terminal of the third semiconductor device face each other.   
     
     
         22 . The electronic device according to  claim 19 ,
 wherein, in plan view, the fourth electrode of the wiring board is located between the first semiconductor device and the third semiconductor device.   
     
     
         23 . The electronic device according to  claim 19 ,
 wherein the first and third semiconductor devices are mounted on the wiring board such that the first and third semiconductor devices are arranged along the second side in plan view, and such that the first and third semiconductor devices are located closer to the second side than the first side in plan view, and   wherein the second and fourth semiconductor devices are mounted on the wiring board such that the second and fourth semiconductor devices are arranged along the first side in plan view, and such that the second and fourth semiconductor devices are located closer to the first side than the second side in plan view.   
     
     
         24 . An electronic device, including:
 a wiring board including a surface, a first electrode formed on the surface, a second electrode formed on the surface, a third electrode formed on the surface, a fourth electrode formed on the surface, a first external terminal electrically connected with the first electrode, a second external terminal electrically connected with the second electrode, a third external terminal electrically connected with the third electrode, and a fourth external terminal electrically connected with the fourth electrode; and   first, second, third and fourth semiconductor devices each including first and second semiconductor chips, a first external connection terminal electrically connected with the first and second semiconductor chips, a second external connection terminal electrically connected with the first and second semiconductor chips, a third external connection terminal electrically connected with the first semiconductor chip, and a sealing body sealing the first and second semiconductor chips,   wherein, in plan view, the surface of the wiring board includes a first side extending in a first direction, a second side extending in the first direction and also facing the first side, a third side extending in a second direction perpendicular to the first direction and also located between the first side and the second side, and a fourth side extending in the second direction and also facing the third side,   wherein, in plan view, the first external terminal is disposed closer to the first side than the second side,   wherein, in plan view, the second, third and fourth external terminals are disposed closer to the second side than the first side,   wherein, in plan view, the fourth external terminal is arranged between the second terminal and the third external terminal,   wherein the first semiconductor chip includes a first insulated gate bipolar transistor having an emitter electrode, a collector electrode, and a gate electrode,   wherein the second semiconductor chip includes a diode having an anode electrode and a cathode electrode,   wherein the first external connection terminal is electrically connected with the emitter electrode of the first semiconductor chip and the anode electrode of the second semiconductor chip,   wherein the second external connection terminal is electrically connected with the collector electrode of the first semiconductor chip and the cathode electrode of the second semiconductor chip,   wherein the third external connection terminal is electrically connected with the gate electrode of the first semiconductor chip,   wherein the sealing body includes an upper surface, a lower surface opposite to the upper surface, a first side surface located between the upper surface and the lower surface, and a second side surface located between the upper surface and the lower surface and also facing the first side surface,   wherein the first external connection terminal is exposed from the first side surface of the sealing body,   wherein the second external connection terminal is exposed from the lower surface of the sealing body,   wherein the third external connection terminal is exposed from the second side surface of the sealing body,   wherein the first, second, third and fourth semiconductor devices are mounted on the wiring board such that the lower surface of the sealing body of each of the first, second, third and fourth semiconductor devices faces the surface of the wiring board,   wherein the first external connection terminal of the first semiconductor device and the first external connection terminal of the third semiconductor device are electrically connected with the fourth electrode of the wiring board,   wherein the second external connection terminal of the first semiconductor device and the first external connection terminal of the second semiconductor device are electrically connected with the second electrode of the wiring board,   wherein the second external connection terminal of the third semiconductor device and the first external connection terminal of the fourth semiconductor device are electrically connected with the third electrode of the wiring board,   wherein the second external connection terminal of the second semiconductor device and the second external connection terminal of the fourth semiconductor device are electrically connected with the first electrode of the wiring board, and   wherein the first and third semiconductor devices are mounted on the wiring board such that the first, second and third external connection terminals of the first semiconductor device and the first, second and third external connection terminals of the third semiconductor device are arranged along the first direction in plan view, and   wherein the second and fourth semiconductor devices are mounted on the wiring board such that the first, second and third external connection terminals of the second semiconductor device and the first, second and third external connection terminals of the fourth semiconductor device are arranged along the second direction in plan view.   
     
     
         25 . The electronic device according to  claim 24 ,
 wherein, in plan view, the first and fourth external terminals are located on a first virtual line extending in the second direction.   
     
     
         26 . The electronic device according to  claim 24 ,
 wherein the first and third semiconductor devices are mounted on the wiring board such that the first external connection terminal of the first semiconductor device and the first external connection terminal of the third semiconductor device face each other.   
     
     
         27 . The electronic device according to  claim 24 ,
 wherein, in plan view, the fourth electrode of the wiring board is located between the first semiconductor device and the third semiconductor device.   
     
     
         28 . The electronic device according to  claim 24 ,
 wherein the first and third semiconductor devices are mounted on the wiring board such that the first and third semiconductor devices are arranged along the second side in plan view, and such that the first and third semiconductor devices are located closer to the second side than the first side in plan view, and   wherein the second and fourth semiconductor devices are mounted on the wiring board such that the second and fourth semiconductor devices are arranged along the first side in plan view, and such that the second and fourth semiconductor devices are located closer to the first side than the second side in plan view.