Semiconductor package

Abstract

A semiconductor package includes: a plurality of lead members disposed with a space therebetween over a surface of a substrate, a first semiconductor chip disposed in a face-up manner over the first surface of the substrate between at least two of the plurality of lead members; a second semiconductor chip disposed in a face-up manner over the first semiconductor chip and the at least two lead members, and a connection member for connecting the substrate, the at least two lead members, the first semiconductor chip and the second semiconductor chip with one another.

What is claimed is: 
     
         1 . A semiconductor package, comprising:
 a plurality of lead members disposed with a space therebetween over a surface of a substrate;   a first semiconductor chip disposed in a face-up manner over the surface of the substrate between at least two of the plurality of lead members;   a second semiconductor chip disposed in a face-down manner over the first semiconductor chip and the at least two lead members; and   a connection member for connecting the substrate, the at least two lead members, the first semiconductor chip and the second semiconductor chip with one another.   
     
     
         2 . The semiconductor package of  claim 1 , wherein each of the plurality of lead members has an inverted T-shaped cross-section. 
     
     
         3 . The semiconductor package of  claim 2 , wherein the connection member includes:
 a first connection member for connecting the first semiconductor chip with a lead member from among the plurality of lead members;   a second connection member for connecting the lead member with the substrate; and   a third connection member for connecting the second semiconductor chip with the lead member.   
     
     
         4 . The semiconductor package of  claim 3 , wherein the first and second connection members include a conductive wire and the third connection member includes a bump. 
     
     
         5 . The semiconductor package of  claim 1 , wherein the plurality of lead members each has an L-shaped cross-section. 
     
     
         6 . The semiconductor package of  claim 5 , wherein the connection member includes:
 a first connection member for connecting the first semiconductor chip with the substrate;   a second connection member for connecting a lead member from among the plurality of lead members with the substrate; and   a third connection member for connecting the second semiconductor chip with the lead member.   
     
     
         7 . The semiconductor package of  claim 6 , wherein the first and second connection members include a conductive wire and the third connection member includes a bump. 
     
     
         8 . The semiconductor package of  claim 1 , further comprising:
 at least one third semiconductor chip stacked in a face-up manner over the second semiconductor chip.   
     
     
         9 . The semiconductor package of  claim 1 , further comprising:
 further lead members disposed at two edges of the first surface of the substrate.