Four-phase charge pump circuit

Abstract

A four-phase charge pump circuit including an output stage and multiple boosting stages is provided. The multiple boosting stages are coupled to the output stage in series, and each of the multiple boosting stages is driven by four-phase clock signals. The output stage is driven by two clock signals of the four-phase clock signals and outputs a positive boosted voltage, and thereby the four-phase charge pump circuit is a positive charge pump circuit. Each of the boosting stages includes two branch charge pumps, and each of the two branch charge pumps includes a main pass transistor and a pre-charge transistor. The main pass transistors and the pre-charge transistors of the boosting stages are disposed on an identical deep doped region.

What is claimed is: 
     
         1 . A four-phase charge pump circuit comprising:
 multiple boosting stages driven by four-phase clock signals, wherein each of the boosting stages comprises two branch charge pumps, and each of the two branch charge pumps comprises:
 a main pass transistor having a body, a gate terminal, a source terminal as a first node of the branch charge pump and a drain terminal as a second node of the branch charge pump, wherein the first node and the second node of the branch charge pump connect respectively to a front boosting stage and a rear boosting stage of the boosting stages; and 
 a pre-charge transistor having a gate terminal, a source terminal and a drain terminal, wherein the source terminal and the drain terminal of the pre-charge transistor are respectively coupled to the gate terminal of the main transistor and the first node of the branch charge pump, and the gate terminal of the pre-charge transistor is coupled to the second node of the branch charge pump, 
   wherein the main pass transistors and the pre-charge transistors of the boosting stages are disposed on an identical deep doped region.   
     
     
         2 . The four-phase charge pump circuit as claimed in  claim 1 , wherein each of the two branch charge pumps further comprises:
 two capacitors coupled respectively to the gate terminal of the main pass transistor and the second node of the branch charge pump.   
     
     
         3 . The four-phase charge pump circuit as claimed in  claim 2 , wherein for each of the boosting stages, the two capacitors of one branch charge pump receive two clock signals of the four-phase clock signals, and the two capacitors of the other branch charge pump receive the other two clock signals of the four-phase clock signals. 
     
     
         4 . The four-phase charge pump circuit as claimed in  claim 1 , wherein each of the two branch charge pumps further comprises:
 two substrate transistors, each of the two substrate transistors having a body, a gate terminal, a source terminal and a drain terminal, wherein the source terminals and the bodies of the two substrate transistors are connected together to the body of the main pass transistor, and the drain terminals of the two substrate transistors are connected respectively to the first node and the second node of the branch charge pump,   wherein the gate terminal of one substrate transistor, whose drain terminal connects to the second node, is connected to the first node of one branch charge pump that the one substrate transistor is located, and the gate terminal of the other substrate transistor is connected to the first node of the other branch charge pump.   
     
     
         5 . The four-phase charge pump circuit as claimed in  claim 4 , wherein each of the two branch charge pumps further comprises:
 an initial transistor having a body, a gate terminal, a source terminal and a drain terminal, wherein the drain terminal and the source terminal of the initial transistor are respectively coupled to the first node and the second node of the branch charge pump, the gate terminal of the initial transistor is coupled to the drain terminal of the initial transistor, and the body of the initial transistor are connected to the body of the main pass transistor.   
     
     
         6 . The four-phase charge pump circuit as claimed in  claim 5 , wherein potential at the body of each of the main pass transistors and the initial transistors of the boosting stages is kept at a lower substrate level. 
     
     
         7 . The four-phase charge pump circuit as claimed in  claim 5 , wherein the substrate transistors and the initial transistors of the boosting stages are disposed on the identical deep doped region. 
     
     
         8 . The four-phase charge pump circuit as claimed in  claim 5 , wherein the main pass transistors, the pre-charge transistors, the substrate transistors and the initial transistors of the boosting stages are N-channel metal-oxide-semiconductor field-effect transistors (MOSFETs). 
     
     
         9 . The four-phase charge pump circuit as claimed in  claim 1  further comprising:
 an output stage driven by two clock signals of the four-phase clock signals and outputting a boosted voltage, wherein the multiple boosting stages are coupled to the output stage. 
 
     
     
         10 . The four-phase charge pump circuit as claimed in  claim 9 , wherein the output stage comprises two branch output circuits, and each of the two branch output circuits comprises:
 a main pass transistor having a body, a gate terminal, a source terminal as a first node of the branch output circuit and a drain terminal as a second node of the branch output circuit, wherein the first node of the branch output circuit connects to a front boosting stage of the boosting stages, and the second node of the branch output circuit serves as an output end of the output stage to output the boosted voltage; and   a pre-charge transistor having a gate terminal, a source terminal and a drain terminal, wherein the source terminal and the drain terminal of the pre-charge transistor are respectively coupled to the gate terminal of the main transistor and the first node of the branch output circuit, and the gate terminal of the pre-charge transistor is coupled to the second node of the branch output circuit,   wherein the main pass transistors and the pre-charge transistors of the output stage are disposed on the identical deep doped region.   
     
     
         11 . The four-phase charge pump circuit as claimed in  claim 10 , wherein each of the two branch output circuits further comprises:
 one capacitor coupled to the gate terminal of the main pass transistor,   wherein the capacitors of the output stage receive two clock signals of the four-phase clock signals.   
     
     
         12 . The four-phase charge pump circuit as claimed in  claim 10 , wherein each of the two branch charge pumps further comprises:
 two substrate transistors, each having a body, a gate terminal, a source terminal and a drain terminal, wherein the source terminals and the bodies of the two substrate transistors are connected together to the body of the main pass transistor, and the drain terminals of the two substrate transistors are connected respectively to the first node and the second node of the branch output circuit,   wherein the gate terminal of one substrate transistor, whose drain terminal connects to the second node, is connected to the first node of one branch output circuit that the one substrate transistor is located, and the gate terminal of the other substrate transistor is connected to the first node of the other branch output circuit.   
     
     
         13 . The four-phase charge pump circuit as claimed in  claim 12 , wherein potential at the body of each of the main pass transistors of the output stage is kept at a lower substrate level. 
     
     
         14 . The four-phase charge pump circuit as claimed in  claim 12 , wherein the substrate transistors of the output stage are disposed on the identical deep doped region. 
     
     
         15 . The four-phase charge pump circuit as claimed in  claim 12 , wherein the main pass transistors, the pre-charge transistors and the substrate transistors of the output stage are N-channel MOSFETs. 
     
     
         16 . The four-phase charge pump circuit as claimed in  claim 1 , wherein the four-phase charge pump circuit is a positive charge pump circuit.