US2016005699A1PendingUtilityA1

Method of manufacturing semiconductor device

Assignee: RENESAS ELECTRONICS CORPPriority: May 23, 2012Filed: Sep 17, 2015Published: Jan 7, 2016
Est. expiryMay 23, 2032(~5.8 yrs left)· nominal 20-yr term from priority
H10W 90/756H10W 90/736H10W 74/00H10W 72/07352H10W 72/5522H10W 72/5449H10W 72/5366H10W 72/932H10W 72/884H10W 72/321H10W 72/075H10W 72/073H10W 99/00H10W 74/129H10W 74/111H10W 74/016H10W 72/50H10W 70/427H10W 70/424H10W 70/421H10W 70/417H10W 70/048H10W 42/121H01L 23/562H01L 23/3107H01L 23/49551H01L 23/49513
48
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Claims

Abstract

The method includes the steps of: providing a lead frame, including providing a concaved part in an upper face of a joint part of a die-pad-support lead of a lead frame for setting down a die pad and a tie-bar; bonding a semiconductor chip to a first principal face of the die pad via an adhesive-member layer; then, setting the lead frame between first and second molding dies having first and second cavities respectively so that the first and second cavities are opposed to each other, and the second principal face of the die pad faces toward the second cavity; and forming first and second resin sealed bodies on the sides of the first and second principal faces of the die pad respectively by resin sealing with the first and second molding dies clamping the tie-bar and a part of the lead frame surrounding the tie-bar.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a die pad;   a die-pad-support lead supporting said die pad, said die-pad-support lead including:
 a first surface, 
 a second surface opposite to said first surface, 
 a first end face located between said first surface and said second surface in cross-section view, 
 a second end face located between said first surface and said second surface in cross-section view, and also located closer to said die pad than said first end face, and 
 a third surface located between said first surface and said second surface in cross-section view, and also located between said first end face and said second end face in cross-section view; 
   a semiconductor chip mounted over said die pad, said semiconductor chip including a plurality of bonding pads;   a plurality of leads electrically connected with said bonding pads via a plurality of wires, respectively; and   a resin-sealing-body sealing said semiconductor chip, said wires and a part of each of said leads,   wherein said first end face of said die-pad-support lead is exposed from said resin-sealing-body, and   wherein said first surface, said second surface, said second end face and said third surface are covered with said resin-sealing-body.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein said semiconductor chip is mounted over an upper surface of said die pad,   wherein said first surface is located at the same side as said upper surface of said die pad,   wherein said first end face is intersecting with said second surface in cross-section view, and   wherein said second end face is intersecting with said first surface in cross-section view.   
     
     
         3 . The semiconductor device according to  claim 1 ,
 wherein said resin-sealing-body is comprised of:
 a first resin-sealing-body including:
 an upper surface of said resin-sealing-body located above said semiconductor chip in cross-section view, and 
 a first side surface intersecting with said upper surface of said resin-sealing-body, and a second resin-sealing-body including: 
 a lower surface of said resin-sealing-body located below said die pad in cross-section view, and also opposite to said upper surface, and 
 a second side surface intersecting with said lower surface of said resin-sealing-body, and 
 
   wherein said first side surface of said first resin-sealing-body is located closer to said semiconductor chip than said second side surface of said second resin-sealing-body.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein said resin-sealing-body includes:
 an upper surface located above said semiconductor chip in cross-section view, and 
 a lower surface located below said die pad in cross-section view, and also opposite to said upper surface, 
   wherein, in cross-section view, said die-pad-support lead is bended toward said lower surface of said resin-sealing-body, and   wherein, in cross-section view, said die pad is located closer to said lower surface of said resin-sealing-body than said upper surface of said resin-sealing-body.   
     
     
         5 . The semiconductor device according to  claim 1 ,
 wherein a size of said die pad is smaller than a size of said semiconductor chip.   
     
     
         6 . A semiconductor device, comprising:
 a die pad;   a die-pad-support lead supporting said die pad, said die-pad-support lead including:
 a first portion, 
 a second portion located between said first portion and said die pad, and 
 a third portion located between said first portion and said second portion, 
   a semiconductor chip mounted over said die pad, said semiconductor chip including a plurality of bonding pads;   a plurality of leads electrically connected with said bonding pads via a plurality of wires, respectively; and   a resin-sealing-body sealing said semiconductor chip, said wires and a part of each of said leads,   wherein said first portion including:
 a first surface, 
 a second surface opposite to said first surface, 
 a first end face located between said first surface and said second surface in cross-section view, 
 a second end face located between said first surface and said second surface in cross-section view, and also located closer to said die pad than said first end face, and 
 a third surface located between said first surface and said second surface in cross-section view, and also located between said first end face and said second end face in cross-section view; 
   wherein said first end face of said die-pad-support lead is exposed from said resin-sealing-body, and   wherein said first surface, said second surface, said second end face and said third surface are covered with said resin-sealing-body.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein said semiconductor chip is mounted over an upper surface of said die pad,   wherein said first surface is located at the same side as said upper surface of said die pad,   wherein said first end face is intersecting with said second surface in cross-section view, and   wherein said second end face is intersecting with said first surface in cross-section view.   
     
     
         8 . The semiconductor device according to  claim 6 ,
 wherein said resin-sealing-body is comprised of:
 a first resin-sealing-body including:
 an upper surface of said resin-sealing-body located above said semiconductor chip in cross-section view, and 
 a first side surface intersecting with said upper surface of said resin-sealing-body, and 
 
 a second resin-sealing-body including:
 a lower surface of said resin-sealing-body located below said die pad in cross-section view, and also opposite to said upper surface, and 
 a second side surface intersecting with said lower surface of said resin-sealing-body, and 
 
   wherein said first side surface of said first resin-sealing-body is located closer to said semiconductor chip than said second side surface of said second resin-sealing-body.   
     
     
         9 . The semiconductor device according to  claim 6 ,
 wherein said resin-sealing-body includes:
 an upper surface located above said semiconductor chip in cross-section view, and 
 a lower surface located below said die pad in cross-section view, and also opposite to said upper surface, 
   wherein, in cross-section view, said second portion of said die-pad-support lead is located closer to said lower surface of said resin-sealing-body than said first portion of said die-pad-support lead, and   wherein, in cross-section view, said die pad is located closer to said lower surface of said resin-sealing-body than said upper surface of said resin-sealing-body.   
     
     
         10 . The semiconductor device according to  claim 6 ,
 wherein a size of said die pad is smaller than a size of said semiconductor chip.

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