Replacement gate process and device manufactured using the same
Abstract
A replacement gate process is disclosed. A substrate and a dummy gate structure formed on the substrate is provided, wherein the dummy gate structure comprises a dummy layer on the substrate, a hard mask layer on the dummy layer, spacers at two sides of the dummy layer and the hard mask layer, and a contact etch stop layer (CESL) covering the substrate, the spacers and the hard mask layer. The spacers and the CESL are made of the same material. Then, a top portion of the CESL is removed to expose the hard mask layer. Next, the hard mask layer is removed. Afterward, the dummy layer is removed to form a trench.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor structure, comprising:
a substrate; spacers formed oppositely on the substrate and spaced apart to form a trench therebetween; a patterned CESL formed at outsides of the spacers and covering the substrate; and a metal gate formed in the trench; wherein the spacers and the CESL are made of the same material.
2 . The semiconductor structure according to claim 1 , wherein the spacers and the CESL are made of SICN, which is formed by atomic layer deposition (ALD).
3 . The semiconductor structure according to claim 1 , further comprising a gate dielectric layer formed in the trench and positioned between the substrate and the metal gate.
4 . The semiconductor structure according to claim 3 , wherein the gate dielectric layer is a high-K dielectric layer, or a multi-layer comprising an oxide layer and the high-K dielectric layer formed on the oxide layer.
5 . The semiconductor structure according to claim 1 , further comprising a fin channel formed on the substrate, a source and a drain, an extending direction of the fin channel being perpendicular to an extending direction of the trench, the source and the drain separately formed on two oppositely sides of the fin channel, and the source and the drain positioned outside and adjacent to the spacers.Join the waitlist — get patent alerts
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