Memristive devices with layered junctions and methods for fabricating the same

Abstract

Memristor systems and method for fabricating memristor system are disclosed. In one aspect, a memristor includes a first electrode, a second electrode, and a junction disposed between the first electrode and the second electrode. The junction includes at least one layer such that each layer has a plurality of dopant sub-layers disposed between insulating sub-layers. The sub-layers are oriented substantially parallel to the first and second electrodes.

1 - 20 . (canceled) 
     
     
         21 . A memristor forming a rectifier, comprising:
 a first electrode;   a second electrode; and   a junction disposed between the first and second electrodes, wherein the junction includes a layer, the layer having a gradient in dopant distribution from the first electrode to the second electrode to form the rectifier.   
     
     
         22 . The memristor of  claim 21 , wherein a region having a relatively high dopant concentration forms an Ohmic-like barrier in contact with an electrode and wherein a region having a relatively low dopant concentration forms a Schottky-like barrier in contact with an electrode. 
     
     
         23 . The memristor of  claim 22 , wherein the region of relatively low dopant concentration in contact with the first electrode and the region of relatively high dopant concentration in contact with the second electrode form a forward rectifier. 
     
     
         24 . The memristor of  claim 22 , wherein the region of relatively high dopant concentration in contact with the first electrode and the region of relatively low dopant concentration in contact with the second electrode form a reverse rectifier. 
     
     
         25 . The memristor of  claim 22 , wherein a first region of relatively high dopant concentration in contact with the first electrode, a second region of relatively high dopant concentration in contact with the second electrode, and a region of relatively low dopant concentration between the two regions of relatively high dopant concentration form a shunted rectifier. 
     
     
         26 . The memristor of  claim 22 , wherein a first region of relatively low dopant concentration in contact with the first electrode, a second region of relatively low dopant concentration in contact with the second electrode, and a region of relatively high dopant concentration between the two regions of relatively low dopant concentration form a head-to-head rectifier. 
     
     
         27 . The memristor of  claim 21 , wherein the layer has a plurality of dopant sub-layers disposed between insulating sub-layers, with an insulating sub-layer between each pair of dopant sub-layers. 
     
     
         28 . The memristor of  claim 27  wherein the gradient is achieved by the insulating sub-layers varying in thickness such that the dopant sub-layers in each layer are spaced closer together in a direction toward an electrode. 
     
     
         29 . The memristor of  claim 27 , wherein each dopant sub-layer comprises mobile dopants. 
     
     
         30 . A memristor forming a rectifier, comprising:
 a first electrode;   a second electrode; and   a junction disposed between the first and second electrodes, wherein the junction includes a layer, the layer having a gradient in dopant distribution from the first electrode to the second electrode to form the rectifier,   wherein the layer has a plurality of dopant sub-layers disposed between insulating sub-layers, with an insulating sub-layer between each pair of dopant sub-layers.   
     
     
         31 . The memristor of  claim 30  wherein each dopant sub-layer comprises mobile dopants. 
     
     
         32 . The memristor of  claim 30 , wherein the dopant sub-layers layers are substantially planar and substantially parallel to one another. 
     
     
         33 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises the insulating sub-layers varying in thickness such that the dopant sub-layers in each layer are spaced closer together toward the first electrode, each layer having a plurality of dopant sub-layers to form a forward rectifier. 
     
     
         34 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises the insulating sub-layers varying in thickness such that the dopant sub-layers in each layer are spaced closer together toward the second electrode, each layer having a plurality of dopant sub-layers to form a reverse rectifier. 
     
     
         35 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises the insulating sub-layers varying in thickness such that the dopant sub-layers are spaced closer together toward the center of each layer to form a shunted rectifier. 
     
     
         36 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises the insulating sub-layers varying in thickness such that the dopant sub-layers in each layer are spaced farther apart toward the center of each layer to form a head-to-head rectifier. 
     
     
         37 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises a Schottky-like barrier formed from dopant sub-layers within a layer of the junction located adjacent to one of the electrodes. 
     
     
         38 . The memristor of  claim 30 , wherein the plurality of dopant sub-layers disposed between insulating sub-layers further comprises an Ohmic-like barrier formed from insulating sub-layers within a layer of the junction located adjacent to one of the electrodes. 
     
     
         39 . The memristor of  claim 30  wherein each dopant sub-layer comprises mobile dopants.