Simd processor and control processor, and processing element with address calculating unit

Abstract

To improve processing efficiency of a SIMD processor that divides two-dimensional data into blocks, each having a width of PE number N, to store the data in a local memory of each of PEs by a lateral direction priority method. When designating a local address of N pieces of data arranged in a row direction from head data whose coordinate values in two-dimensional data are (X,Y) to a PE array 110, the N pieces of data being stored in local memories, a CP 150 broadcasts a local address A 1, a local address A 2, and a threshold number Z obtained by an address calculation unit. Each of the PEs compares a magnitude relation between the threshold number Z and its own number, and selects one of the local address A 1 and the local address A 2 according to the comparison result.

What is claimed is: 
     
         1 . A processor element in a Single Instruction Multiple Data (SIMD) processor, the processor element comprising N, wherein
 N is an integer of two or larger, pieces of processor elements which are connected in a ring shape and to which numbers are sequentially assigned, and a control processor which controls the N pieces of processor elements, two-dimensional data having a width of W, wherein   W is an integral multiple of N, N being divided into blocks, each block having a width of N and the number of rows of M, wherein   M is an integer of one or larger, the SIMD processor transferring the two-dimensional data to local memories from an external memory in such a way that blocks located on an upper side are preferentially transferred, and N pieces of data in a same row in a same block are to be stored in a same local address of the respective local memories of the N pieces of processor elements, wherein   each of the processor elements comprises an address selector that compares, upon receiving a local address A 1 , a local address A 2 , and a threshold number Z broadcasted from the control processor, a magnitude relation of the threshold number Z and an identification number of the processor element and selects one of the local address A 1  and the local address A 2  according to the comparison result.