Inter-cell interference algorithms for soft decoding of ldpc codes

Abstract

Aspects of the subject technology relate to a method for reading information stored in a flash memory device. In some implementations, the method can include steps including, obtaining a first read signal of a first cell, wherein the first cell is located in a first word line and in a first bit line in the flash memory device, obtaining a programming level of a second cell, wherein the second cell is located in a second word line and in the first bit line, and wherein the second word line is adjacent to the first word line. In certain aspects, the method may further comprise steps for obtaining decoding information for the first cell based on the programming level of the second cell, wherein the decoding information is derived from a first set of reference voltage distributions corresponding to the obtained programming level of the second cell. A data storage system and a non-transitory machine readable storage medium are also provided.

What is claimed is: 
     
         1 . A method, comprising:
 obtaining a first read signal of a first cell, wherein the first cell is located in a first word line and in a first bit line in a flash memory device;   obtaining a programming level of a second cell, wherein the second cell is located in a second word line and in the first bit line, and wherein the second word line is adjacent to the first word line; and   obtaining decoding information for the first cell based on the programming level of the second cell, wherein the decoding information is derived from a first set of reference voltage distributions corresponding to the obtained programming level of the second cell.   
     
     
         2 . The method of  claim 1 , further comprising:
 programming references cells of a first reference word line and reference cells of a second reference word line adjacent to the first reference word line; and   reading the reference cells of the first reference word line and the reference cells of the second reference word line,   wherein the decoding information is based on values read from the reference cells of the first and second reference word lines.   
     
     
         3 . The method of  claim 2 , further comprising:
 determining a programming level for each of the reference cells of the second reference word line based on the values read from the reference cells of the second reference word line;   dividing the values read from the reference cells of the first reference word line into a plurality of subsets of read values based on the determined programming levels for the reference cells of the second reference word line, each subset of read values corresponding to a respective programming level; and   determining a set of reference voltage distributions for each of the subsets, wherein the first set of reference voltage distributions is one of the determined sets of reference voltage distributions.   
     
     
         4 . The method of  claim 3 , further comprising:
 generating a log-likelihood ratio (LLR) mapping table for each subset of read values and a corresponding programming level,   wherein the decoding information comprises an LLR value.   
     
     
         5 . The method of  claim 4 , wherein obtaining the decoding information comprises:
 referencing one of the generated LLR mapping tables corresponding to the obtained programming level of the second cell; and   selecting the LLR value from the referenced LLR mapping table based on the first read signal of the first cell.   
     
     
         6 . The method of  claim 5 , further comprising decoding the first read signal of the first cell based on the decoding information. 
     
     
         7 . A data storage system, comprising:
 a flash memory device; and   a controller coupled to the flash memory device, wherein the controller is configured to perform operations for:
 obtaining a first read signal of a first cell, wherein the first cell is located in a first word line and in a first bit line in the flash memory device; 
 obtaining a programming level of a second cell, wherein the second cell is located in a second word line and in the first bit line, and wherein the second word line is adjacent to the first word line; and 
 obtaining decoding information for the first cell based on the programming level of the second cell, wherein the decoding information is derived from a first set of reference voltage distributions corresponding to the obtained programming level of the second cell. 
   
     
     
         8 . The data storage system of  claim 7 , wherein the controller is further configured to perform operations comprising:
 programming references cells of a first reference word line and reference cells of a second reference word line adjacent to the first reference word line; and   reading the reference cells of the first reference word line and the reference cells of the second reference word line,   wherein the decoding information is based on values read from the reference cells of the first and second reference word lines.   
     
     
         9 . The data storage system of  claim 8 , wherein the controller is further configured to perform operations comprising:
 determining a programming level for each of the reference cells of the second reference word line based on the values read from the reference cells of the second reference word line;   dividing the values read from the reference cells of the first reference word line into a plurality of subsets of read values based on the determined programming levels for the reference cells of the second reference word line, each subset of read values corresponding to a respective programming level; and   determining a set of reference voltage distributions for each of the subsets, wherein the first set of reference voltage distributions is one of the determined sets of reference voltage distributions.   
     
     
         10 . The data storage system of  claim 9 , wherein the controller is further configured to perform operations comprising:
 generating a log-likelihood ratio (LLR) mapping table for each subset of read values and a corresponding programming level,   wherein the decoding information comprises an LLR value.   
     
     
         11 . The data storage system of  claim 10 , wherein the controller is further configured to perform operations comprising:
 referencing one of the generated LLR mapping tables corresponding to the obtained programming level of the second cell; and   selecting the LLR value from the referenced LLR mapping table based on the first read signal of the first cell.   
     
     
         12 . The data storage system of  claim 11 , wherein the controller is further configured to perform operations comprising decoding the first read signal of the first cell based on the decoding information. 
     
     
         13 . A non-transitory machine readable storage medium storing instructions executable by a processor to perform operations comprising:
 obtaining a first read signal of a first cell, wherein the first cell is located in a first word line and in a first bit line in a flash memory device;   obtaining a programming level of a second cell, wherein the second cell is located in a second word line and in the first bit line, and wherein the second word line is adjacent to the first word line; and   obtaining decoding information for the first cell based on the programming level of the second cell, wherein the decoding information is derived from a first set of reference voltage distributions corresponding to the obtained programming level of the second cell.   
     
     
         14 . The non-transitory machine readable storage medium of  claim 1 , wherein the operations further comprise:
 programming references cells of a first reference word line and reference cells of a second reference word line adjacent to the first reference word line; and   reading the reference cells of the first reference word line and the reference cells of the second reference word line,   wherein the decoding information is based on values read from the reference cells of the first and second reference word lines.   
     
     
         15 . The non-transitory machine readable storage medium of  claim 14 , wherein the operations further comprise:
 determining a programming level for each of the reference cells of the second reference word line based on the values read from the reference cells of the second reference word line;   dividing the values read from the reference cells of the first reference word line into a plurality of subsets of read values based on the determined programming levels for the reference cells of the second reference word line, each subset of read values corresponding to a respective programming level; and   determining a set of reference voltage distributions for each of the subsets, wherein the first set of reference voltage distributions is one of the determined sets of reference voltage distributions.   
     
     
         16 . The non-transitory machine readable storage medium of  claim 15 , wherein the operations further comprise:
 generating a log-likelihood ratio (LLR) mapping table for each subset of read values and a corresponding programming level,   wherein the decoding information comprises an LLR value.   
     
     
         17 . The non-transitory machine readable storage medium of  claim 16 , wherein the operations further comprise:
 referencing one of the generated LLR mapping tables corresponding to the obtained programming level of the second cell; and   selecting the LLR value from the referenced LLR mapping table based on the first read signal of the first cell.   
     
     
         18 . The non-transitory machine readable storage medium of  claim 1 , wherein the operations further comprise decoding the first read signal of the first cell based on the decoding information.