Electronic Device, Test Board, and Semiconductor Device Manufacturing Method
Abstract
Electrical characteristics of a mounting board over which a semiconductor device is mounted is improved. A mounting board (wiring board) includes a plurality of first through holes and second through holes extending from its upper surface bearing a semiconductor device (semiconductor package) to its lower surface and through-hole wirings formed in the respective through holes. The mounting board has a capacitor arranged on its lower surface and electrically connected with the semiconductor device via second electrodes. Among a plurality of first electrodes formed on the upper surface of the mounting board, the several first electrodes to be connected with the capacitor are connected with one wiring formed in a first through hole with a larger diameter than a signal transmission path.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An electronic device comprising:
a first wiring board including a first surface, a plurality of first electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of second electrodes formed on the second surface, and a plurality of holes extending from one of the first surface and the second surface towards the other surface; a semiconductor package including a second wiring board, a semiconductor chip mounted on an upper surface of the second wiring board, and a plurality of first external terminals formed on a lower surface of the second wiring board opposite to the upper surface, the semiconductor package being mounted over the first surface of the first wiring board via the plurality of first external terminals; and a capacitor including a plurality of second external terminals, the capacitor being mounted over the second surface of the first wiring board, wherein the plurality of first external terminals of the semiconductor package are electrically connected with the plurality of first electrodes of the first wiring board, respectively, wherein the plurality of second external terminals of the capacitor are electrically connected with the plurality of second electrodes of the first wiring board, respectively, wherein the plurality of first electrodes include a plurality of first voltage electrodes, a plurality of second voltage electrodes, and a plurality of first signal electrodes, wherein the plurality of second electrodes include a first voltage electrode, a second voltage electrode, and a plurality of second signal electrodes, wherein the plurality of holes include a first voltage hole, a second voltage hole, and a plurality of signal holes, wherein a diameter of each of the first and second voltage holes is larger than a diameter of each of the plurality of signal holes, wherein the plurality of first voltage electrodes of the plurality of first electrodes are electrically connected with one another via a first voltage wiring formed inside of the first voltage hole, and also electrically connected with the first voltage electrode of the plurality of second electrodes, wherein the plurality of second voltage electrodes of the plurality of first electrodes are electrically connected with one another via a second voltage wiring formed inside of the second voltage hole, and also electrically connected with the second voltage electrode of the plurality of second electrodes, and wherein the plurality of first signal electrodes of the plurality of first electrodes are respectively electrically connected with the plurality of second signal electrodes of the plurality of second electrodes via a plurality of signal wirings respectively formed inside of the plurality of signal holes, and also electrically separated from one another.
2 . The electronic device according to claim 1 ,
wherein a thickness of the first wiring board is larger than a thickness of the second wiring board.
3 . A test board comprising:
a first wiring board including a first surface, a plurality of first electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of second electrodes formed on the second surface, and a plurality of holes extending from one of the first surface and the second surface towards the other surface; a test socket including a housing for housing a semiconductor package and a plurality of test terminals arranged in the housing, the test socket being fixed to the first surface of the first wiring board; and a capacitor including a plurality of external terminals, the capacitor being mounted over the second surface of the first wiring board, wherein the plurality of test terminals of the test socket are electrically connected with the plurality of first electrodes of the first wiring board, respectively, wherein the plurality of external terminals of the capacitor are electrically connected with the plurality of second electrodes of the first wiring board, respectively, wherein the plurality of first electrodes include a plurality of first voltage electrodes, a plurality of second voltage electrodes, and a plurality of first signal electrodes, wherein the plurality of second electrodes include a first voltage electrode, a second voltage electrode, and a plurality of second signal electrodes, wherein the plurality of holes include a first voltage hole, a second voltage hole, and a plurality of signal holes, wherein a diameter of each of the first and second voltage holes is larger than a diameter of each of the plurality of signal holes, wherein the plurality of first voltage electrodes of the plurality of first electrodes are electrically connected with one another via a first voltage wiring formed inside of the first voltage hole, and also electrically connected with the first voltage electrode of the plurality of second electrodes, wherein the plurality of second voltage electrodes of the plurality of first electrodes are electrically connected with one another via a second voltage wiring formed inside of the second voltage hole, and also electrically connected with the second voltage electrode of the plurality of second electrodes, and wherein the plurality of first signal electrodes of the plurality of first electrodes are respectively electrically connected with the plurality of second signal electrodes of the plurality of second electrodes via a plurality of signal wirings respectively formed inside of the plurality of signal holes, and also electrically separated from one another.
4 . An electronic device comprising:
a first wiring board including a first surface, a plurality of first electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of second electrodes formed on the second surface, and a plurality of holes extending from the first surface in the direction of the second surface; a semiconductor package including a second wiring board, a semiconductor chip mounted on an upper surface of the second wiring board, and a plurality of first external terminals formed on a lower surface of the second wiring board opposite to the upper surface, the semiconductor package being mounted over the first surface of the first wiring board via the plurality of first external terminals; wherein the plurality of first external terminals of the semiconductor package are electrically connected with the plurality of first electrodes of the first wiring board, respectively, wherein the plurality of first electrodes formed on the first surface of the first wiring board includes a plurality of first voltage electrodes, a plurality of second voltage electrodes, and a plurality of first signal electrodes, wherein the plurality of second electrodes formed on the second surface of the first wiring board includes at least one first voltage electrode at least one second voltage electrode and a plurality of second signal electrodes, wherein the plurality of holes include at least one first voltage hole connecting the first and second surfaces, at least one second voltage hole connecting the first second surfaces, and a plurality of signal holes which terminate midway between the first and second surfaces of the first wiring board; and wherein a diameter of each of the first and second voltage holes is larger than a diameter of each of the plurality of signal holes.
5 . The electronic device according to claim 4 ,
wherein the plurality of first voltage electrodes are electrically connected with one another via the at least one first voltage hole; wherein the plurality of second voltage electrodes are electrically connected with one another via the at least one first second voltage hole; and wherein the first signal electrodes are electrically separated from one another.
6 . The electronic device according to claim 4 ,
wherein each of the first signal electrodes is electrically connected to a corresponding one of the second signal electrodes via: a signal wiring formed inside a corresponding signal hole; and a detour wiring located between the first and second surfaces of the first wring board.
7 . The electronic device according to claim 6 ,
wherein the detour wiring passes between the corresponding signal hole and one of the first and second voltage holes.
8 . The electronic device according to claim 7 ,
wherein the detour wiring passes between the corresponding signal hole and one of the first and second voltage holes which does not overlap the semiconductor package in a thickness direction of the first wiring board.
9 . The electronic device according to claim 4 , further comprising:
a capacitor including a plurality of second external terminals, the capacitor being mounted over the second surface of the first wiring board, and wherein the plurality of second external terminals of the capacitor are electrically connected with the plurality of second electrodes of the first wiring board, respectively.
10 . The electronic device according to claim 4 ,
wherein a thickness of the first wiring board is larger than a thickness of the second wiring board.
11 . A test board comprising:
a first wiring board including a first surface, a plurality of first electrodes formed on the first surface, a second surface opposite to the first surface, a plurality of second electrodes formed on the second surface, and a plurality of holes extending from the first surface in the direction of the second surface; a test socket including a housing for housing a semiconductor package and a plurality of test terminals arranged in the housing, the test socket being fixed to the first surface of the first wiring board; wherein the plurality of test terminals of the test socket are electrically connected with the plurality of first electrodes of the first wiring board, respectively, wherein the plurality of first electrodes formed on the first surface of the first wiring board includes a plurality of first voltage electrodes, a plurality of second voltage electrodes, and a plurality of first signal electrodes, wherein the plurality of second electrodes formed on the second surface of the first wiring board includes at least one first voltage electrode at least one second voltage electrode and a plurality of second signal electrodes, wherein the plurality of holes include at least one first voltage hole connecting the first and second surfaces, at least one second voltage hole connecting the first second surfaces, and a plurality of signal holes which terminate midway between the first and second surfaces of the first wiring board; and wherein a diameter of each of the first and second voltage holes is larger than a diameter of each of the plurality of signal holes.
12 . The electronic device according to claim 11 ,
wherein the plurality of first voltage electrodes are electrically connected with one another via the at least one first voltage hole; wherein the plurality of second voltage electrodes are electrically connected with one another via the at least one first second voltage hole; and wherein the first signal electrodes are electrically separated from one another.
13 . The electronic device according to claim 11 ,
wherein each of the first signal electrodes is electrically connected to a corresponding one of the second signal electrodes via: a signal wiring formed inside a corresponding signal hole; and a detour wiring located between the first and second surfaces of the first wring board.
14 . The electronic device according to claim 13 ,
wherein the detour wiring passes between the corresponding signal hole and one of the first and second voltage holes.
15 . The electronic device according to claim 14 ,
wherein the detour wiring passes between the corresponding signal hole and one of the first and second voltage holes which does not overlap the semiconductor package in a thickness direction of the first wiring board.
16 . The electronic device according to claim 11 , further comprising:
a capacitor including a plurality of external terminals, the capacitor being mounted over the second surface of the first wiring board, and wherein the plurality of external terminals of the capacitor are electrically connected with the plurality of second electrodes of the first wiring board, respectively.
17 . The electronic device according to claim 11 ,
wherein a thickness of the first wiring board is larger than a thickness of the second wiring board.Join the waitlist — get patent alerts
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