Semiconductor device

Abstract

A semiconductor device having a capacitor, which provides enhanced reliability. A wiring and a capacitor are formed over an interlayer insulating film overlying a semiconductor substrate and another interlayer insulating film is formed over the interlayer insulating film so as to cover the wiring and capacitor. The capacitor includes a lower electrode overlying the interlayer insulating film, an upper electrode overlying the interlayer insulating film to cover the lower electrode at least partially, and a capacitive insulating film interposed between the lower and upper electrodes. The upper electrode and the wiring are formed from a conductive film pattern in the same layer. A plug is located under, and electrically coupled to, the lower electrode and another plug is located over the upper electrode's portion not overlapping the lower electrode in plan view and electrically coupled to the upper electrode. Another plug is located over, and electrically coupled to, the wiring.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor substrate;   a first interlayer insulating film formed over the semiconductor substrate;   a first wiring and a lower electrode for a capacitor being formed over the first interlayer insulating film and spaced from each other;   an upper electrode for the capacitor being formed over the first interlayer insulating film so as to cover the lower electrode at least partially;   a capacitive insulating film for the capacitor, interposed between the lower electrode and the upper electrode;   a second interlayer insulating film formed over the first interlayer insulating film so as to cover the first wiring, the lower electrode, the capacitive insulating film, and the upper electrode;   a first contact plug buried in the first interlayer insulating film, the first contact plug being located under the lower electrode and electrically coupled to the lower electrode;   a second contact plug buried in the second interlayer insulating film, the second contact plug being located over the upper electrode and electrically coupled to the upper electrode; and   a third contact plug buried in the second interlayer insulating film, the third contact plug being located over the first wiring and electrically coupled to the first wiring,   wherein the first wiring and the upper electrode are formed from a conductive film pattern in a layer, and   wherein the second contact plug is located over a portion of the upper electrode not overlapping the lower electrode in plan view.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein a contact plug to be buried in the second interlayer insulating film and coupled to the upper electrode is not formed over a portion of the upper electrode overlapping the lower electrode in plan view.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein the first wiring is an aluminum wiring which contains aluminum as a main component, and   wherein the lower electrode is made of a material having a higher melting point than a melting point of aluminum.   
     
     
         4 . The semiconductor device according to  claim 3 ,
 wherein the lower electrode is a titanium nitride film, titanium film, tantalum nitride film or tantalum film.   
     
     
         5 . The semiconductor device according to  claim 1 ,
 wherein the first wiring and the upper electrode are each a laminated film including a first titanium nitride film, an aluminum-based main conductive film over the first titanium nitride film, and a second titanium nitride film over the main conductive film, and   wherein the lower electrode is a titanium nitride film.   
     
     
         6 . The semiconductor device according to  claim 1 ,
 wherein in plan view, the lower electrode is contained in the capacitive insulating film and the capacitive insulating film is contained in the upper electrode.   
     
     
         7 . The semiconductor device according to  claim 1 ,
 wherein in plan view, the lower electrode has a portion overlapping the upper electrode and a portion not overlapping the upper electrode, and   wherein in plan view, a contact plug to be buried in the second interlayer insulating film and coupled to the lower electrode is not formed over the portion of the lower electrode not overlapping the upper electrode.   
     
     
         8 . The semiconductor device according to  claim 1 , further comprising a resistor formed over the second interlayer insulating film,
 wherein the resistor and the lower electrode are formed from a conductive film pattern in a layer,   wherein a fourth contact plug buried in the first interlayer insulating film is located under the resistor and electrically coupled to the resistor, and   wherein a contact plug to be buried in the second interlayer insulating film and coupled to the resistor is not formed over the resistor.   
     
     
         9 . The semiconductor device according to  claim 1 , wherein a thickness of the lower electrode is smaller than a thickness of the first wiring. 
     
     
         10 . A semiconductor device comprising:
 a semiconductor substrate;   a first interlayer insulating film formed over the semiconductor substrate;   a first wiring and a lower electrode for a capacitor being formed over the first interlayer insulating film and spaced from each other;   an upper electrode for the capacitor being formed over the first interlayer insulating film so as to cover the lower electrode at least partially;   a capacitive insulating film for the capacitor, interposed between the lower electrode and the upper electrode;   a second interlayer insulating film formed over the first interlayer insulating film so as to cover the first wiring, the lower electrode, the capacitive insulating film, and the upper electrode;   a first contact plug buried in the first interlayer insulating film, the first contact plug being located under the lower electrode and electrically coupled to the lower electrode;   a second contact plug buried in the first interlayer insulating film, the second contact plug being located under the upper electrode and electrically coupled to the upper electrode; and   a third contact plug buried in the second interlayer insulating film, the third contact plug being located over the first wiring and electrically coupled to the first wiring,   wherein the first wiring and the upper electrode are formed from a conductive film pattern in a layer, and   wherein the second contact plug is located under a portion of the upper electrode not overlapping the lower electrode in plan view.   
     
     
         11 . The semiconductor device according to  claim 10 ,
 wherein a contact plug to be buried in the second interlayer insulating film and coupled to the upper electrode is not formed over a portion of the upper electrode overlapping the lower electrode in plan view.   
     
     
         12 . The semiconductor device according to  claim 11 ,
 wherein the first wiring is an aluminum wiring which contains aluminum as a main component, and   wherein the lower electrode is made of a material having a higher melting point than a melting point of aluminum.   
     
     
         13 . The semiconductor device according to  claim 12 ,
 wherein the lower electrode is a titanium nitride film, titanium film, tantalum nitride film or tantalum film.   
     
     
         14 . The semiconductor device according to  claim 10 ,
 wherein the first wiring and the upper electrode are each a laminated film including a first titanium nitride film, an aluminum-based main conductive film over the first titanium nitride film, and a second titanium nitride film over the main conductive film, and   wherein the lower electrode is a titanium nitride film.   
     
     
         15 . The semiconductor device according to  claim 10 , wherein in plan view, the lower electrode is contained in the capacitive insulating film and the capacitive insulating film is contained in the upper electrode. 
     
     
         16 . The semiconductor device according to  claim 10 ,
 wherein in plan view, the lower electrode has a portion overlapping the upper electrode and a portion not overlapping the upper electrode, and   wherein in plan view, a contact plug to be buried in the second interlayer insulating film and coupled to the lower electrode is not formed over the portion of the lower electrode not overlapping the upper electrode.   
     
     
         17 . The semiconductor device according to  claim 10 , further comprising a resistor formed over the second interlayer insulating film,
 wherein the resistor and the lower electrode are formed from a conductive film pattern in a layer,   wherein a fourth contact plug buried in the first interlayer insulating film is located under the resistor and electrically coupled to the resistor, and   wherein a contact plug to be buried in the second interlayer insulating film and coupled to the resistor is not formed over the resistor.   
     
     
         18 . The semiconductor device according to  claim 10 ,
 wherein a thickness of the lower electrode is smaller than a thickness of the first wiring.