Ultrathin Multilayer Metal Alloy Liner for Nano Cu Interconnects

Abstract

Compositions of matter, compounds, articles of manufacture and processes to reduce or substantially eliminate EM and/or stress migration, and/or TDDB in copper interconnects in microelectronic devices and circuits, especially a metal liner around copper interconnects comprise an ultra thin layer or layers of Mn alloys containing at least one of W and/or Co on the metal liner. This novel alloy provides EM and/or stress migration resistance, and/or TDDB resistance in these copper interconnects, comparable to thicker layers of other alloys found in substantially larger circuits and allows the miniaturization of the circuit without having to use thicker EM and/or TDDB resistant alloys previously used thereby enhancing the miniaturization, i.e., these novel alloy layers can be miniaturized along with the circuit and provide substantially the same EM and/or TDDB resistance as thicker layers of different alloy materials previously used that lose some of their EM and/or TDDB resistance when used as thinner layers.

We claim: 
     
         1 . A process comprising: (a) forming wire embedded in a dielectric layer on a semiconductor substrate, said wire comprising a copper core comprising sidewalls and a bottom of said copper core, a top surface of said wire coplanar with a top surface of said dielectric layer; (b) forming an electrically conductive alloy liner on said sidewalls based on Mn, with at least one of Co and/or W to minimize or eliminate EM and/or TDDB; (c) without exposing said substrate to oxygen, forming a dielectric liner over said alloy liner, any exposed portions of said alloy liner, and said dielectric layer. 
     
     
         2 . The process of  claim 1 , wherein: (b) and (c) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (c) are performed in a different chamber or chambers of a second deposition tool without removing said substrate from said tool. 
     
     
         3 . The process of  claim 1 , wherein said liner is formed by either selective chemical vapor deposition or selective atomic layer deposition. 
     
     
         4 . The process of  claim 1 , where in said liner comprise a Co/Mn, Co/Mn/W, W/Mn, or W/Mn/Co layer and intercalated combinations of Co/Mn/W layers as an alloy of Mn of from about 0.1 to about 20_parts by weight, Co of from about 0 to about 100_parts by weight and W of from about from about 0 to about 100 parts by weight. 
     
     
         5 . The process of  claim 4 , wherein said liner comprises an ultra thin metal alloy liner from about 0.3 nm to about 1 nm thick. 
     
     
         6 . The process of  claim 1 , wherein: (b), (c) and (d) are performed in a same chamber of a first deposition tool without removing said substrate from said chamber; or (b) and (d) are performed in a first chamber and (c) is performed in a third chamber of a second deposition tool; or (b), (d) and (c) are performed in different chambers of a third deposition tool. 
     
     
         7 . The process of  claim 1 , further including: between (a) and (b), recessing a top surface of said copper core below said top surface of said dielectric layer. 
     
     
         8 . The process of  claim 1 , further comprising conducting the process in an integrated in-situ apparatus having from about 3 to about 5 chambers including a lower chamber and conducting said deposition by means of said apparatus to deposit at least one of multilayer metals, or metal alloys or dielectrics and optionally performing a cure treatment in said lower chamber. 
     
     
         9 . A structure, comprising: a wire embedded in a dielectric layer on a semiconductor substrate, said wire comprising a copper core and an electrically conductive metal alloy liner on sidewalls and a bottom of said copper core, said copper core and said electrically conductive metal alloy liner exposed at a top surface of said dielectric layer; core; a dielectric cap over said metal cap, on any exposed portions of said metal alloy liner, and on said dielectric layer; and wherein said liner comprises an alloy of Mn, with at lest one of Co and/or W 
     
     
         10 . The structure of  claim 9  wherein said alloy liner is an ultra thin liner from about 0.1 nm to about 3.0 nm thick. 
     
     
         11 . The structure of  claim 9 , wherein a top surface of said copper core and said electrically conductive metal alloy liner are coplanar with said top surface of said dielectric layer. 
     
     
         12 . The structure of  claim 9 , wherein a top surface of said electrically conductive metal alloy liner is coplanar with said top surface of said dielectric layer and a top surface of said copper core is recessed below said top surface of said dielectric layer. 
     
     
         13 . The structure of  claim 12 , wherein a top surface of said copper core and said electrically conductive metal alloy liner are coplanar with said top surface of said dielectric layer. 
     
     
         14 . The structure of  claim 9 , wherein a top surface of said electrically conductive metal alloy liner is coplanar with said top surface of said dielectric layer and a top surface of said copper core is recessed below said top surface of said dielectric layer. 
     
     
         15 . The process of  claim 1  further comprising further downstream treatments selected from at least one of UV and Low rf stream plasma or thermal cure treatments in at least one of a reducing environment or inert gas ambient to enhance the reaction/intermixing between each layer and between the Cu-Metal alloy interface formed in the process. 
     
     
         16 . A deposition tool comprising: a load/unload chamber; a mechanism for transferring a substrate between said load/unload chamber and a deposition chamber, said deposition chamber connected to said load/unload chamber by a port;
 and wherein said deposition chamber is (i) configured to selectively form a metal layer or layers on copper by chemical vapor deposition or by atomic layer deposition and (ii) is configured to form a dielectric layer by chemical vapor deposition, and additionally comprising further downstream chambers selected from at least one of a UV and a Low rf stream plasma or thermal cure means in at least one of a reducing environment ambient to enhance the reaction/intermixing between said layer or layers and said copper.   
     
     
         17 . The deposition tool of  claim 16  having from about 4 to about 5 chambers including a lower chamber, said chambers being employed for depositing multilayer metals, metal alloys and dielectrics and for optionally performing a cure treatment in said lower chamber. 
     
     
         18 . The process of  claim 1  wherein said electrically conductive metal alloy liner on said sidewalls comprises a multilayer metal alloy liner on said copper core. 
     
     
         19 . The process of  claim 1  for forming non-corrosive coatings for thick or large Cu substrates, comprising applying to said substrate an electrically conductive metal alloy based on Mn, with at lest one of Co and/or W where said substrate comprises metal pads used in C4 flip-chip and wire bonds, high-Q inductors, and laser-blown fuses. 
     
     
         20 . The structure of  claim 9  comprising a Cu-based MEMS with Cu interconnect wiring that includes a self-aligned corrosion-resistant coating of Cu wiring.