Method of Manufacturing Semiconductor Device
Abstract
To provide a semiconductor device having improved reliability at an improved production yield. After forming an insulating film on the main surface of a semiconductor substrate as an oxide film, form a silicon nitride film on the insulating film. Then, form an element isolating trench by plasma dry etching, form an insulating film made of silicon oxide so as to fill the trench by using HDP-CVD, and remove the insulating film outside the trench by CMP, while leaving the insulating film in the trench. Then, remove the silicon nitride film, followed by removal of the insulating film by wet etching to expose the semiconductor substrate. At this time the insulating film is wet etched while applying light of 140 lux or greater to the main surface of the semiconductor substrate.
Claims
exact text as granted — not AI-modified1 - 17 . (canceled)
18 . A method of manufacturing a semiconductor device, comprising the steps of:
(a) preparing a semiconductor substrate; (b) forming a first insulating film, including a first silicon oxide film and a first silicon nitride film, over the main surface of the semiconductor substrate; (c) forming an element isolating trench in the first insulating film and the semiconductor substrate by plasma dry etching of the first insulating film and the semiconductor substrate; (d) forming a second insulating film, including a second silicon oxide film, over the main surface of the semiconductor substrate so as to fill the trench; (e) removing the second insulating film outside the trench by Chemical Mechanical Polishing (CMP) while keeping the second insulating film in the trench; (f) after the step (e), removing the first insulating film by wet etching to expose the semiconductor substrate, the first insulating film being wet etched while applying light of 140 lux or greater to the first insulating film; (g) after the step (f), implanting a dopant into the semiconductor substrate to form a well; and (h) after the step (g), forming a gate insulating film of a Metal Insulator Semiconductor Field Effect Transistor (MISFET) over the well.
19 . The method according to claim 18 , wherein in the step (f), the first insulating film is wet etched by supplying an etching solution to the rotating semiconductor substrate.
20 . The method according to claim 18 , wherein in the step (b), the first silicon oxide film is formed by a thermal oxidation.
21 . The method according to claim 20 , wherein in the step (b), the first silicon nitride film is formed by a CVD method.
22 . The method according to claim 18 , wherein in the step (d), the second insulating film is formed by a high-density plasma CVD method.
23 . The method according to claim 22 , wherein the second insulating film is a silicon oxide film.
24 . The method according to claim 18 , wherein, after the step (h), when the gate insulating film is wet etched with a resist layer lying thereon, the main surface of the resist layer is prevented from irradiation of light having 100 lux or greater thereto.Join the waitlist — get patent alerts
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