Microelectronic package and stacked microelectronic assembly and computing system containing same

Abstract

A microelectronic package comprises a die ( 110, 210 ) and a plurality of electrically conductive layers ( 120, 220 ) and electrically insulating layers ( 130, 230 ), including a first electrically insulating layer ( 131, 231 ) closer to the die than any other electrically insulating layer) and second ( 132, 232 ) and third electrically insulating layers ( 233 ). Each electrically insulating layer has a corresponding glass transition temperature, coefficient of thermal expansion, and modulus of elasticity. The modulus of elasticity of the second electrically insulating layer is greater than that for the first electrically insulating layer, while CTE 1 for the second electrically insulating layer is greater than CTE 1 for the first. CTE 2 for the third electrically insulating layer is less than CTE 2 for the first electrically insulating layer. In an embodiment an electrically insulating layer is a glass cloth layer ( 140 ) that is an outermost layer of the microelectronic package.

What is claimed is: 
     
         1 . A microelectronic package comprising:
 a microelectronic die;   a plurality of electrically conductive layers;   a plurality of electrically insulating layers including:
 a first electrically insulating layer closer to the die than any other electrically insulating layer; and 
 a second electrically insulating layer; and 
   a first glass cloth layer comprising a plurality of glass fibers encapsulated in a dielectric material, the first glass cloth layer constituting an outermost layer of the microelectronic package.   
     
     
         2 . The microelectronic package of  claim 1  wherein:
 the second electrically insulating layer is farther from the die than any other electrically insulating layer other than the first glass cloth layer. 
 
     
     
         3 . The microelectronic package of  claim 2  wherein:
 the second electrically insulating layer comprises a second glass cloth layer having a thickness no greater than 75 micrometers. 
 
     
     
         4 . The microelectronic package of  claim 2  wherein:
 the second electrically insulating layer comprises a second glass cloth layer having a thickness no greater than 55 micrometers. 
 
     
     
         5 . The microelectronic package of  claim 2  wherein:
 the second electrically insulating layer comprises a dielectric material having a thickness no greater than 30 micrometers.