ELECTRICALLY ISOLATED SiGe FIN FORMATION BY LOCAL OXIDATION

Abstract

A silicon germanium alloy layer is formed on a semiconductor material layer by epitaxy. An oxygen impermeable layer is formed on the silicon germanium alloy layer. The oxygen impermeable layer and the silicon germanium alloy layer are patterned to form stacks of a silicon germanium alloy fin and an oxygen impermeable cap. A shallow trench isolation structure is formed by deposition, planarization, and recessing or an oxygen permeable dielectric material. An oxygen impermeable spacer is formed around each stack of a silicon germanium alloy fin and an oxygen impermeable cap. A thermal oxidation process is performed to convert a lower portion of each silicon germanium alloy fin into a silicon germanium oxide. During the thermal oxidation process, germanium atoms diffuse into unoxidized portions of the silicon germanium alloy fins to increase the germanium concentration therein.

1 .- 10 . (canceled) 
     
     
         11 . A method of forming a semiconductor structure comprising:
 forming a plurality of vertical stacks on a semiconductor material layer, each of said plurality of vertical stacks including a silicon germanium alloy fin and an oxygen impermeable cap;   forming a shallow trench isolation structure laterally surrounding lower portions of said plurality of vertical stacks, said shallow trench isolation structure comprising an oxygen permeable material;   forming an oxygen impermeable spacer directly on sidewalls of upper portions of said plurality of vertical stacks;   oxidizing an upper portion of said semiconductor material layer and lower portions of each of said plurality of silicon germanium alloy fins employing an oxidation process; and   physically exposing sidewall surfaces of remaining portions of said plurality of silicon germanium alloy fins by removing said plurality of oxygen impermeable spacers and said plurality of oxygen impermeable caps.   
     
     
         12 . The method of  claim 11 , further comprising forming an oxygen permeable material layer above said shallow trench isolation structure and between said plurality of vertical stacks prior to said oxidation process. 
     
     
         13 . The method of  claim 12 , further comprising removing said oxygen permeable material layer after said oxidation process. 
     
     
         14 . The method of  claim 12 , wherein said oxygen permeable material layer is formed by depositing an oxygen permeable dielectric material on said shallow trench isolation structure to a height above topmost surfaces of said plurality of vertical stacks. 
     
     
         15 . The method of  claim 11 , wherein said semiconductor material layer does not include germanium, or includes less germanium than said plurality of silicon germanium alloy fins. 
     
     
         16 . The method of  claim 11 , wherein said oxidation process drives germanium atoms from oxidized portions of said plurality of silicon germanium alloy fins into unoxidized remaining portions of said plurality of silicon germanium alloy fins. 
     
     
         17 . The method of  claim 11 , wherein said plurality of vertical stacks is formed by:
 providing a material stack including a silicon germanium alloy layer and an oxygen impermeable material layer on said semiconductor material layer; and   patterning said material stack, wherein remaining portions of said material stack comprise said plurality of vertical stacks.   
     
     
         18 . The method of  claim 17 , wherein said silicon germanium alloy layer is formed by epitaxial deposition of a silicon germanium alloy material on a single crystalline semiconductor material in said semiconductor material layer. 
     
     
         19 . The method of  claim 18 , wherein said semiconductor material layer is a single crystalline silicon layer. 
     
     
         20 . The method of  claim 11 , further comprising forming a gate structure straddling said remaining portions of said plurality of silicon germanium alloy fins, said gate structure comprising a gate dielectric and a gate electrode. 
     
     
         21 . The method of  claim 11 , wherein said forming said shallow trench isolation structure comprises depositing a dielectric material layer between each vertical stack and recessing said dielectric material layer to provide said shallow trench isolation structure, said shallow trench isolation structure having a height that is less than a height of said vertical stack. 
     
     
         22 . The method of  claim 11 , wherein said oxygen impermeable spacer is formed on a topmost surface of said shallow trench isolation structure. 
     
     
         23 . The method of  claim 11 , wherein said upper portion of said semiconductor material layer is converted into a contiguous semiconductor oxide portion having a semiconductor oxide pedestal portion located beneath each silicon germanium alloy fin. 
     
     
         24 . The method of  claim 23 , wherein each of said plurality of silicon germanium alloy fins comprises a pair of concave bottom surfaces that contact surfaces of said semiconductor oxide pedestal. 
     
     
         25 . The method of  claim 24 , wherein said pair of concave surfaces is adjoined at an edge that is parallel to a pair of vertical sidewalls of one of said plurality of silicon germanium alloy fins. 
     
     
         26 . The method of  claim 23 , wherein a portion of an interface between said contiguous semiconductor oxide portion and said semiconductor material layer protrudes downward in regions that do not underlie any of said plurality of silicon germanium alloy fins with respect to another portion of said interface in regions that underlie said plurality of silicon germanium alloy fins. 
     
     
         27 . The method of  claim 23 , wherein each semiconductor oxide pedestal has a greater concentration of germanium atoms that a portion of said contiguous semiconductor oxide portion that is located beneath said each semiconductor oxide pedestal. 
     
     
         28 . The method of  claim 23 , wherein a ratio of germanium atoms to silicon atoms in said plurality of silicon germanium alloy fins is greater than a ratio of germanium atoms to silicon atoms in each semiconductor oxide pedestal.