Dual silicide integration with laser annealing

Abstract

The embodiments of the present invention relate generally to the fabrication of integrated circuits, and more particularly to a structure and method for fabricating more particularly to a structure and method for fabricating silicides with different compositions and/or thicknesses on a single structure having more than one type of device using laser annealing. A method is disclosed that includes using a photoresist compatible with a laser annealing process to protect a region of a semiconductor substrate from silicide formation.

1 .- 10 . (canceled) 
     
     
         11 . A method comprising:
 forming a first photoresist layer on a first device formed on a semiconductor substrate;   forming a first metal layer on a second device formed on the semiconductor substrate and the first photoresist layer;   performing a laser annealing process to form a first silicide on a source-drain region of the second device;   removing unreacted portions of the first metal layer;   removing the first photoresist layer;   forming a second metal layer on the first device and on the second device; and   performing another laser annealing process to form a second silicide on a source-drain region of the first device.   
     
     
         12 . The method of  claim 11 , wherein the first photoresist layer comprises:
 a resist material able to withstand a post-exposure bake (PEB) temperature ranging from approximately 70° C. to approximately 115° C. for approximately 60 seconds.   
     
     
         13 . The method of  claim 11 , further comprising:
 forming a second photoresist layer on the second device before forming the second metal layer, the second photoresist layer comprising a resist material able to withstand a post-exposure bake (PEB) temperature ranging from approximately 70° C. to approximately 115° C. for approximately 60 seconds.   
     
     
         14 . The method of  claim 11 , wherein the performing the laser annealing process comprises:
 performing a first laser anneal within a first temperature range;   removing unreacted portions of the first metal layer; and   performing a second laser anneal within a second temperature range.   
     
     
         15 . The method of  claim 11 , wherein the second silicide has a different thickness than the first silicide. 
     
     
         16 . The method of  claim 11 , wherein the performing the laser annealing process comprises:
 subjecting a portion of the semiconductor substrate to a laser beam having a power ranging from approximately 100 W to approximately 800 W for a duration ranging from approximately 0.5 ms to approximately 500 ms.   
     
     
         17 . The method of  claim 11 , wherein the forming the second silicide on the source-drain region of the first device changes the composition of the first silicide. 
     
     
         18 . A method comprising:
 protecting a first region of a semiconductor substrate from silicide formation during an annealing process by forming a photoresist layer on the first region, the photoresist layer isolating the first region from a metal layer formed over a second region of the semiconductor substrate and the photoresist layer.   
     
     
         19 . The method of  claim 18 , wherein the photoresist layer is comprised of a resist material able to withstand a post-exposure bake (PEB) temperature ranging from approximately 70° C. to approximately 115° C. for approximately 60 seconds. 
     
     
         20 . The method of  claim 18 , wherein the annealing process comprises subjecting a portion of the semiconductor substrate to a laser beam having a power ranging from approximately 100 W to approximately 800 W for a duration ranging from approximately 0.5 ms to approximately 500 ms. 
     
     
         21 . The method of  claim 19 , wherein the resist has an optical path length of from approximately 75 nm to approximately 125 nm. 
     
     
         22 . The method of  claim 12 , wherein the resist has an optical path length of from approximately 75 nm to approximately 125 nm. 
     
     
         23 . The method of  claim 11 , wherein the laser annealing process is performed in an inert gas ambient. 
     
     
         24 . The method of  claim 11 , wherein the removing unreacted portions of the first metal layer comprises an etchant solution comprising one or more oxidizers. 
     
     
         25 . The method of  claim 11 , wherein the performing the another laser annealing process comprises:
 performing a first laser anneal within a first temperature range;   removing unreacted portions of the second metal layer; and   performing a second laser anneal within a second temperature range.   
     
     
         26 . The method of  claim 11 , wherein the performing the another laser annealing process comprises:
 subjecting a portion of the semiconductor substrate to a laser beam having a power ranging from approximately 100 W to approximately 800 W for a duration ranging from approximately 0.5 ms to approximately 500 ms.   
     
     
         27 . The method of  claim 11 , wherein a second photoresist is formed on the second device prior to forming the second material layer and the second photoresist is removed after performing the another laser anneal process. 
     
     
         28 . The method of  claim 11 , wherein the second metal layer is formed directly upon surfaces of the first silicide. 
     
     
         29 . The method of  claim 11 , wherein the performing the annealing process comprises:
 performing a first laser anneal within a first temperature range to form the first silicide; and   removing unreacted portions of the second metal layer.   
     
     
         30 . The method of  claim 11 , wherein the performing the another annealing process comprises:
 performing a first laser anneal within a first temperature range to form the second silicide; and   removing unreacted portions of the second metal layer.