US2015332913A1PendingUtilityA1

Semiconductor Processing Methods, and Methods for Forming Silicon Dioxide

Assignee: MICRON TECHNOLOGY INCPriority: Jan 7, 2008Filed: Jul 17, 2015Published: Nov 19, 2015
Est. expiryJan 7, 2028(~1.4 yrs left)· nominal 20-yr term from priority
Inventors:Shyam Surthi
H10P 14/69215H10P 14/6682H10P 14/6339H10P 14/6334C23C 16/45546C23C 16/46C23C 16/402C23C 16/45544H01L 21/0228H01L 21/02164
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Claims

Abstract

Some embodiments include methods for semiconductor processing. A semiconductor substrate may be placed within a reaction chamber. The semiconductor substrate may have an inner region and an outer region laterally outward of said inner region, and may have a deposition surface that extends across the inner and outer regions. The semiconductor substrate may be heated by radiating thermal energy from the outer region to the inner region. The heating may eventually achieve thermal equilibrium. However, before thermal equilibrium of the outer and inner regions is reached, and while the outer region is warmer than the inner region, at least two reactants are sequentially introduced into the reaction chamber. The reactants may together form a single composition on the deposition surface through a quasi-ALD process.

Claims

exact text as granted — not AI-modified
I/we claim: 
     
         1 . A semiconductor processing method, comprising:
 providing at least one semiconductor substrate within a heating apparatus, said heating apparatus having a chamber which receives the at least one semiconductor substrate, having a sidewall around the chamber, and having one or more heating modules that heat the sidewall; the at least one semiconductor substrate having a central region radially surrounded by an outer region;   increasing a temperature within the chamber, the increasing of the temperature comprising passing heat from the sidewall to the at least one semiconductor substrate; the heat migrating from the outer region to the central region; and   while the outer region is not in thermal equilibrium with the central region such that a temperature gradient exists between the outer region and the central region, utilizing multiple separate and substantially discrete steps of a deposition sequence to form a composition that extends across at least a portion of the outer region of the semiconductor substrate and across at least a portion of the central region of the semiconductor substrate.   
     
     
         2 . The method of  claim 1  wherein the deposition sequence comprises atomic layer deposition. 
     
     
         3 . The method of  claim 1  wherein the deposition sequence comprises a combination of atomic layer deposition and chemical vapor deposition. 
     
     
         4 . A semiconductor processing method, comprising:
 heating a batch of semiconductor substrates within a chamber, the heating utilizing one or more heating units adjacent the batch of semiconductor substrates to radiate heat toward the batch of semiconductor substrates and create a temperature differential across the batch of substrates; and   while the temperature differential is across the batch of semiconductor substrates such that a temperature gradient exists between an outer region of the substrates and an inner region of the substrates, utilizing multiple separate and substantially discrete steps of a deposition sequence to form a composition that extends across surfaces of individual semiconductor substrates of said batch of semiconductor substrates.   
     
     
         5 . The method of  claim 4  wherein:
 the batch of semiconductor substrates having the temperature differential there-across includes a lowest temperature region and a highest temperature region; 
 the multiple separate and discrete steps include flow of at least two separate reactants into the chamber; 
 the reactants are flowed into the chamber through gas lines; and 
 the gas lines are maintained at a temperature that is higher than a temperature of the lowest temperature region during at least some of the flow of the reactants into the chamber. 
 
     
     
         6 . The method of  claim 4  wherein the composition consists of silicon dioxide. 
     
     
         7 . The method of  claim 4  wherein the batch of semiconductor substrates is a stack of the semiconductor substrates, said stack having an upper semiconductor substrate and a lower semiconductor substrate, and wherein the temperature differential includes a temperature gradient along an axis extending from the upper semiconductor substrate to the lower semiconductor substrate. 
     
     
         8 . The method of  claim 4  wherein individual semiconductor substrates of the batch of semiconductor substrates comprise inner regions radially surrounded by outer regions, and wherein the temperature differential includes temperature gradients along axes extending from the inner regions to the outer regions. 
     
     
         9 . The method of  claim 4  wherein:
 the batch of semiconductor substrates is a stack of the semiconductor substrates, said stack having an upper semiconductor substrate and a lower semiconductor substrate, and the temperature differential includes a temperature gradient along an axis extending from the upper semiconductor substrate to the lower semiconductor substrate; and 
 individual semiconductor substrates of the batch of semiconductor substrates comprise inner regions radially surrounded by outer regions, and the temperature differential includes temperature gradients along axes extending from the inner regions to the outer regions. 
 
     
     
         10 . A semiconductor processing method, comprising:
 providing at least one semiconductor substrate having a central region radially surrounded by an outer region;   exposing the substrate to an increasing temperature the increasing of the temperature providing heat migrating from the outer region to the central region; and   while a temperature gradient exists between the outer region and the central region, utilizing multiple separate and substantially discrete steps of a deposition sequence to form a composition that extends across at least a portion of the outer region of the semiconductor substrate and across at least a portion of the central region of the semiconductor substrate.   
     
     
         11 . The method of  claim 10  wherein the deposition sequence comprises atomic layer deposition. 
     
     
         12 . The method of  claim 10  wherein the deposition sequence comprises a combination of atomic layer deposition and chemical vapor deposition. 
     
     
         13 . The method of  claim 10  wherein the exposing is conducted in a chamber of a heating apparatus, the heating apparatus having a plurality of vertically offset heating elements. 
     
     
         14 . The method of  claim 13  wherein the at least one semiconductor substrate is a plurality of semiconductor substrates provided within a holding structure within the chamber, and wherein the plurality of semiconductor substrates are surrounded by the heating elements within the chamber. 
     
     
         15 . The method of  claim 10  wherein the deposition sequence comprises sequential flows of a pair of separate reactants within a processing chamber. 
     
     
         16 . The method of  claim 15  wherein a first reactant comprises a silicon halide and a second reactant comprises oxygen. 
     
     
         17 . The method of  claim 16  wherein the second reactant is water. 
     
     
         18 . The method of  claim 15  further comprising flowing a catalyst into the chamber together with one or both of the separate reactants. 
     
     
         19 . The method of  claim 15  wherein the deposition sequence comprises multiple iterations of sequential flows of the pair of separate reactants. 
     
     
         20 . The method of  claim 10  wherein edges of the substrate are warmer than the central region during the deposition sequence.

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