Systems and methods related to digital-to-analog conversion in radio-frequency applications
Abstract
Systems and methods related to digital-to-analog conversion in radio-frequency (RF) applications. In some embodiments, a wireless system can include a baseband sub-system having a mixing circuit configured to perform a mix mode operation, and a time-interleaved digital-to-analog converter (TIDAC) circuit in communication with the mixing circuit. The TIDAC circuit can include a plurality of sample-and-hold (S/H) circuits, with each S/H circuit being configured to receive a digital signal and generate an analog signal. The baseband sub-system can be further configured to combine the analog signals associated with the S/H circuits and generate an analog output signal. The wireless system can further include an RF sub-system configured to receive the analog output signal from the baseband sub-system and generate an RF signal for transmission.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A wireless system comprising:
a baseband sub-system including a mixing circuit configured to perform a mix mode operation, and a time-interleaved digital-to-analog converter (TIDAC) circuit in communication with the mixing circuit, the TIDAC circuit including a plurality of sample-and-hold (S/H) circuits, each S/H circuit configured to receive a digital signal and generate an analog signal, the baseband sub-system further configured to combine the analog signals associated with the S/H circuits and generate an analog output signal; and a radio-frequency (RF) sub-system configured to receive the analog output signal from the baseband sub-system and generate an RF signal for transmission.
2 . The wireless system of claim 1 wherein the wireless system is implemented in an infrastructure base station.
3 . The wireless system of claim 1 wherein the wireless system is implemented in a portable wireless device.
4 . The wireless system of claim 3 wherein the portable wireless device includes a cellular phone.
5 . The wireless system of claim 1 wherein the baseband sub-system further includes an upsampling circuit configured to upsample an input digital signal by a factor of n, the quantity n being a real number.
6 . The wireless system of claim 5 wherein the baseband sub-system further includes a finite impulse response (FIR) filter configured to receive the upsampled digital signal and generate a filtered upsampled digital signal.
7 . The wireless system of claim 6 wherein each of the S/H circuits is configured to receive the upsampled digital signal and generate the corresponding analog signal.
8 . The wireless system of claim 7 wherein the TIDAC circuit includes a clock in communication with the plurality of S/H circuits, the clock configured to provide interleaved clock signals to the plurality of S/H circuits.
9 . The wireless system of claim 8 wherein the TIDAC circuit further includes a delay circuit configured to provide a delay for at least one of the interleaved clock signals.
10 . The wireless system of claim 7 wherein the mix mode operation is performed in analog domain.
11 . The wireless system of claim 10 wherein the mixing circuit includes a multiplier circuit in communication with each of the plurality of S/H circuits, each multiplier circuit configured to receive the analog signal from its respective S/H circuit and a mixing clock signal, each multiplier circuit further configured to generate a product signal based on the analog signal and the mixing clock signal.
12 . The wireless system of claim 11 wherein the baseband sub-system further includes a summing circuit in communication with each of the plurality of multiplier circuits, the summing circuit configured to receive the product signals from their respective multiplier circuits and generate the analog output signal.
13 . The wireless system of claim 7 wherein the mix mode operation is performed in digital domain.
14 . The wireless system of claim 13 wherein the mixing circuit includes a multiplier circuit in communication with an input of each of the plurality of S/H circuits, the multiplier circuit configured to receive the upsampled digital signal and a mixing clock signal, the multiplier circuit further configured to generate a product signal for the plurality of S/H circuits based on the upsampled digital signal and the mixing clock signal.
15 . The wireless system of claim 14 wherein the baseband sub-system further includes a switching circuit in communication with an output of each of the plurality of S/H circuits, the switching circuit configured to receive the analog signal from each of the plurality of S/H circuits and a clock signal, the switching circuit further configured to generate the analog output signal.
16 . The wireless system of claim 15 wherein the clock signal provided to the switching circuit is provided from the clock of the TIDAC that provides the interleaved clock signals to the plurality of S/H circuits.
17 . A method for operating a wireless system, the method comprising:
performing a mix mode operation and a time-interleaved digital-to-analog conversion (TIDAC) operation on an input digital signal, the TIDAC operation including a plurality of sample-and-hold (S/H) operations, each S/H operating including receiving a digital signal and generating an analog signal; combining the analog signals associated with the S/H operations to generate an analog output signal; and generating a radio-frequency (RF) signal for transmission based on the analog output signal.
18 . The method of claim 17 wherein the mix mode operation is performed after the TIDAC operation.
19 . The method of claim 17 wherein the mix mode operation is performed before the TIDAC operation.
20 . A baseband sub-system comprising:
a mixing circuit configured to perform a mix mode operation; a time-interleaved digital-to-analog converter (TIDAC) circuit in communication with the mixing circuit, the TIDAC circuit including a plurality of sample-and-hold (S/H) circuits, each S/H circuit configured to receive a digital signal and generate an analog signal; and combining circuit configured to combine the analog signals associated with the S/H circuits and generate an analog output signal.Join the waitlist — get patent alerts
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