Switch control circuit and power supply device including the same
Abstract
A switch control circuit includes a first pin connected to a first voltage, and a second pin connected to another end of a first resistor including an end connected to the first pin and a first capacitor. In the switch control circuit, at least two of first dead time information, second dead time information, and a protection mode are set by using a multi-voltage of the second pin. The first dead time information is information about a dead time of a first switch and a second switch controlling power supply, the second dead time information is information about a dead time for synchronous rectification, and the protection mode includes an auto-restart mode and a latch mode.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A switch control circuit comprising:
a first pin configured to be connected to a first voltage; a second pin configured to be connected to a first resistor that is further connected to the first pin and a first capacitor; wherein at least two of first dead time information, second dead time information, and a protection mode are set based on a multi-voltage of the second pin; and further wherein the first dead time information includes information about a dead time of a first switch and a second switch controlling a power supply, the second dead time information includes information about a dead time for synchronous rectification, and the protection mode includes an auto-restart mode and a latch mode.
2 . The switch control circuit of claim 1 , wherein when the multi-voltage starts to occur and reaches an initialization voltage, the switch control circuit is initialized and performs at least one of setting of a first dead time and setting of a second dead time during an initialization period.
3 . The switch control circuit of claim 2 , wherein after the initialization period is ended, a protection mode is set according to a level of the multi-voltage when the multi-voltage is in a steady state.
4 . The switch control circuit of claim 1 , wherein the first switch is connected to the second pin and performs a switching operation based on a remote control signal.
5 . The switch control circuit of claim 4 , wherein:
the multi-voltage occurs when the first switch is turned-off; and the multi-voltage is pulled-down when the first switch is turned-on.
6 . The switch control circuit of claim 1 , further comprising:
a biasing circuit configured to supply the first voltage to the first pin when a source voltage supplied to the switch control circuit is in a steady state.
7 . The switch control circuit of claim 1 , further comprising:
an initialization unit configured to count an initialization period by using a count clock signal from a time at which the multi-voltage reaches an initialization voltage.
8 . The switch control circuit of claim 7 , wherein:
the initialization unit includes a first counter configured to be enabled at a time at which the multi-voltage reaches the initialization voltage, the first counter including a plurality of output ends having a level determined according to a count result using the count clock signal; and the initialization unit being configured to determine an end of the initialization period according to an output of an output end corresponding to the initialization period among the plurality of output ends.
9 . The switch control circuit of claim 1 , wherein a first period during which the multi-voltage is changed from a first threshold voltage to a second threshold voltage is counted to set the first dead time information.
10 . The switch control circuit of claim 9 , further comprising:
a first comparator configured to generate a first comparison signal according to a comparison result of the multi-voltage and the first threshold voltage; a second comparator configured to generate a second comparison signal according to a comparison result of the multi-voltage and the second threshold voltage; and a second counter configured to be enabled based on the first comparison signal and to be reset based on the second comparison signal to count the first period.
11 . The switch control circuit of claim 10 , further comprising:
a first D-flip-flop configured to be reset by an inverted comparison signal obtained by reversing the first comparison signal; a second D-flip-flop configured to be synchronized with an inverted output signal of the first D-flip-flop to output an output signal of an enable level, and to be reset by the second comparison signal; and a first logic gate configured to perform a logical operation of the output signal and the first comparison signal of the second D-flip-flop to generate a first count enable signal; wherein the second counter is synchronized with a rising edge of the first count enable signal to be enabled and is to be reset after a first delay period from a falling edge time of the first count enable signal.
12 . The switch control circuit of claim 11 , further comprising:
a second logic gate configured to perform a logical operation of an inverted first count enable signal and a signal obtained by delaying the first count enable signal by a second delay period to generate a first register read signal.
13 . The switch control circuit of claim 12 , further comprising:
a first register configured to include a plurality of input ends connected to a plurality of output ends of a second counter and to be synchronized with the first register read signal to store inputs of the plurality of input ends; and wherein the plurality of output ends of the second counter have a level according to a count result.
14 . The switch control circuit of claim 1 , wherein a second period during which the multi-voltage is changed from a second threshold voltage to a first threshold voltage is counted to set a second dead time.
15 . The switch control circuit of claim 14 , further comprising:
a first comparator configured to generate a first comparison signal according to a comparison result of the multi-voltage and the first threshold voltage; a third D-flip-flop configured to generate a second count enable signal at a high level at a first time delayed from a time at which the multi-voltage reaches the second threshold voltage by a first delay period, and to be reset by an inverted comparison signal obtained by inverting the first comparison signal; and a second counter configured to be reset at the first time, and synchronized with a rising edge of the second count enable signal to count the second period.
16 . The switch control circuit of claim 15 , further comprising:
a third logic gate configured to perform a logical operation of an inverted second count enable signal and a signal obtained by delaying the second count enable signal by a second delay period to generate a second register read signal.
17 . The switch control circuit of claim 16 , further comprising:
a second register configured to include a plurality of input ends connected to a plurality of output ends of the second counter and be synchronized with the second register read signal to store inputs of the plurality of input ends; wherein the plurality of output ends of the second counter have a level according to a count result.
18 . The switch control circuit of claim 14 , further comprising:
a sink current source configured to be connected to the second pin; a second switch configured to be connected between the sink current source and a ground; and wherein the second switch is synchronized to be turned-on at a time at which the multi-voltage reaches the second threshold voltage, and synchronized to be turned-off at a time at which the multi-voltage reaches the first threshold voltage.
19 . The switch control circuit of claim 1 , further comprising:
a sink current source configured to be connected to the second pin; the second switch configured to be connected between the sink current source and a ground; wherein the second switch is turned-on at a time at which the multi-voltage reaches an initialization voltage, and turned-off at a time at which the multi-voltage reaches a first threshold voltage; and further wherein the initialization voltage is a voltage controlling an initialization start of the switch control circuit, and the first threshold voltage is a voltage controlling the first dead time information and the second dead time information.
20 . The switch control circuit of claim 1 , wherein a diode is connected between the first pin and the first resistor.
21 . A power supply device comprising:
a first switch and a second switch configured to be connected in series between an input voltage and a primary side ground; a transformer configured to include a primary side wire connected between the input voltage and a node situated between the first switch and the second switch and at least one secondary side wire; a first synchronous rectification switch configured to rectify a current flowing through a first wire of a secondary side; a second synchronous rectification switch configured to rectify a current flowing through a second wire of the secondary side; a switch control circuit configured to include a first pin connected to a first voltage and a second pin and to set at least two of first dead time information, second dead time information, and a protection mode based on a multi-voltage of the second pin; a first resistor configured to be connected between the first pin and the second pin; a first capacitor configured to be connected to the second pin; and wherein the first dead time information includes information about a dead time of the first switch and the second switch, the second dead time information includes information about a dead time of the first synchronous rectification switch and the second synchronous rectification switch, and the protection mode includes an auto-restart mode and a latch mode.
22 . The power supply device of claim 21 , further comprising:
the first switch configured to be connected to the second pin; and wherein the first switch performs a switching operation based on a remote control signal.
23 . The power supply device of claim 21 , further comprising:
a sink current source configured to be connected to the second pin; and the second switch being further configured to be connected between the sink current source and the ground.
24 . The power supply device of claim 21 , wherein:
the switch control circuit sets a first dead time by counting a first period during which the multi-voltage is changed from a first threshold voltage to a second threshold voltage.
25 . The power supply device of claim 24 , wherein:
the switch control circuit sets a second dead time by counting a second period during which the multi-voltage is changed from the second threshold voltage to the first threshold voltage.
26 . The power supply device of claim 21 , further comprising:
a diode configured to be connected between the first pin and the first resistor.Join the waitlist — get patent alerts
Track US2015326103A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.