US2015325553A1PendingUtilityA1

Semiconductor Device and Method of Embedding TSV Semiconductor Die Within Substrate for Vertical Interconnect in POP

Assignee: STATS CHIPPAC LTDPriority: Apr 30, 2011Filed: Jul 20, 2015Published: Nov 12, 2015
Est. expiryApr 30, 2031(~4.7 yrs left)· nominal 20-yr term from priority
H10W 90/754H10W 90/734H10W 90/732H10W 90/724H10W 90/722H10W 90/721H10W 90/297H10W 74/15H10W 74/00H10W 72/9415H10W 72/01938H10W 72/01935H10W 72/952H10W 72/944H10W 72/942H10W 72/934H10W 72/884H10W 72/874H10W 72/241H10W 72/073H10W 72/072H10W 72/59H10W 72/29H10W 70/60H10W 90/00H10W 74/111H10W 72/0198H10W 70/09H10W 20/20H10W 20/43H01L 23/3107H01L 2225/06517H01L 2225/0651H01L 23/481H01L 25/0657H01L 2225/0652H01L 2225/06541H01L 23/528
45
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device has a substrate with a first conductive layer over a surface of the substrate and a plurality of cavities exposing the first conductive layer. A first semiconductor die having conductive TSV is mounted into the cavities of the substrate. A first insulating layer is formed over the substrate and first semiconductor die and extends into the cavities to embed the first semiconductor die within the substrate. A portion of the first insulating layer is removed to expose the conductive TSV. A second conductive layer is formed over the conductive TSV. A portion of the first conductive layer is removed to form electrically common or electrically isolated conductive segments of the first conductive layer. A second insulating layer is formed over the substrate and conductive segments of the first conductive layer. A second semiconductor die is mounted over the substrate electrically connected to the second conductive layer.

Claims

exact text as granted — not AI-modified
What is claimed: 
     
         1 . A semiconductor device, comprising:
 a first semiconductor die including a conductive via;   an insulating material disposed in a peripheral region of the first semiconductor die;   an insulating layer disposed over the first semiconductor die and insulating material including a first opening in the insulating layer formed over the conductive via;   a first conductive layer disposed over the insulating layer and first semiconductor die including a cavity in the first conductive layer formed in the first opening; and   a first interconnect structure formed over the conductive via opposite the first conductive layer.   
     
     
         2 . The semiconductor device of  claim 1 , further including:
 a second semiconductor die disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and second semiconductor die and within the cavity of the first conductive layer.   
     
     
         3 . The semiconductor device of  claim 1 , further including:
 a semiconductor package disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and semiconductor package and within the cavity of the first conductive layer.   
     
     
         4 . The semiconductor device of  claim 1 , further including a second opening formed in the insulating layer over the first semiconductor die wherein the second opening is devoid of the first conductive layer. 
     
     
         5 . The semiconductor device of  claim 1 , further including a second conductive layer disposed over the first interconnect structure. 
     
     
         6 . The semiconductor device of  claim 5 , wherein the second conductive layer is a continuous sheet. 
     
     
         7 . A semiconductor device, comprising:
 a first semiconductor die including a conductive via;   an insulating material disposed in a peripheral region of the first semiconductor die;   an insulating layer disposed over the first semiconductor die and insulating material including a first opening in the insulating layer formed over the conductive via; and   a first conductive layer disposed over the insulating layer and first semiconductor die including a cavity in the first conductive layer formed in the first opening.   
     
     
         8 . The semiconductor device of  claim 7 , further including:
 a second semiconductor die disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and second semiconductor die and within the cavity of the first conductive layer.   
     
     
         9 . The semiconductor device of  claim 7 , further including:
 a semiconductor package disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and semiconductor package and within the cavity of the first conductive layer.   
     
     
         10 . The semiconductor device of  claim 7 , further including a second opening formed in the insulating layer over the first semiconductor die wherein the second opening is devoid of the first conductive layer. 
     
     
         11 . The semiconductor device of  claim 7 , further including an interconnect structure formed over the conductive via opposite the first conductive layer. 
     
     
         12 . The semiconductor device of  claim 11 , further including a second conductive layer disposed over the interconnect structure. 
     
     
         13 . The semiconductor device of  claim 12 , wherein the second conductive layer is a continuous sheet. 
     
     
         14 . A semiconductor device, comprising:
 a first semiconductor die including a conductive via;   an insulating layer disposed over the first semiconductor die including a first opening in the insulating layer formed over the conductive via;   a first conductive layer disposed over the insulating layer and first semiconductor die including a cavity in the first conductive layer formed in the first opening; and   a first interconnect structure formed over the conductive via opposite the first conductive layer.   
     
     
         15 . The semiconductor device of  claim 14 , further including:
 a second semiconductor die disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and second semiconductor die and within the cavity of the first conductive layer.   
     
     
         16 . The semiconductor device of  claim 14 , further including:
 a semiconductor package disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and semiconductor package and within the cavity of the first conductive layer.   
     
     
         17 . The semiconductor device of  claim 14 , further including a second opening formed in the insulating layer over the first semiconductor die wherein the second opening is devoid of the first conductive layer. 
     
     
         18 . The semiconductor device of  claim 14 , further including an insulating material disposed around the first semiconductor die and insulating layer. 
     
     
         19 . The semiconductor device of  claim 14 , further including a second conductive layer disposed over the first interconnect structure. 
     
     
         20 . A semiconductor device, comprising:
 a first semiconductor die including a conductive via;   an insulating layer disposed over the first semiconductor die including a first opening in the insulating layer formed over the conductive via; and   a first conductive layer disposed over the insulating layer and first semiconductor die including a cavity in the first conductive layer formed in the first opening.   
     
     
         21 . The semiconductor device of  claim 20 , further including:
 a second semiconductor die disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and second semiconductor die and within the cavity of the first conductive layer.   
     
     
         22 . The semiconductor device of  claim 20 , further including:
 a semiconductor package disposed over the first semiconductor die; and   a second interconnect structure disposed between the first conductive layer and semiconductor package and within the cavity of the first conductive layer.   
     
     
         23 . The semiconductor device of  claim 20 , further including a second opening formed in the insulating layer over the first semiconductor die wherein the second opening is devoid of the first conductive layer. 
     
     
         24 . The semiconductor device of  claim 20 , further including an insulating material disposed around the first semiconductor die and insulating layer. 
     
     
         25 . The semiconductor device of  claim 20 , further including a second conductive layer disposed over the insulating layer opposite the first conductive layer.

Join the waitlist — get patent alerts

Track US2015325553A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.