Semiconductor device and method for manufacturing the same

Abstract

In a semiconductor device and a method for manufacturing the same, a pillar pattern is formed in an alternating pattern and a one side contact (OSC) is formed without using a tilted ion implantation process or a mask, resulting in formation of a vertical gate. The semiconductor device includes an alternating or zigzag-type pillar pattern formed over a semiconductor substrate, a first hole formed between pillars of the pillar pattern, a passivation layer formed over a sidewall of the first hole, a second hole formed by partially etching a lower part of the first hole, a bit line formed in the second hole, and a contact formed at a lower part of the pillar pattern.

1 - 7 . (canceled) 
     
     
         8 . A method for manufacturing a semiconductor device comprising:
 forming an insulation film over a semiconductor substrate;   forming a contact hole by etching the insulation film until the semiconductor substrate is exposed;   forming a pillar pattern by growing silicon in the contact hole;   forming a first hole by etching the insulation film using a bit line mask;   forming a passivation layer over a sidewall of the first hole;   forming a second hole by etching the insulation film at a bottom surface of the first hole;   forming a buried bit line in the second hole; and   forming a contact in the pillar pattern.   
     
     
         9 . The method according to  claim 8 , further comprising:
 forming a first hard mask layer between the semiconductor substrate and the insulation film.   
     
     
         10 . The method according to  claim 8 , further comprising:
 after forming the pillar pattern, planarizing the silicon.   
     
     
         11 . The method according to  claim 10 , further comprising:
 after planarizing the silicon, forming a second hard mask layer over the pillar pattern and over the insulation film.   
     
     
         12 . The method according to  claim 8 , wherein the forming a second hole includes performing a wet etching process on the insulation film. 
     
     
         13 . The method according to  claim 8 , wherein the buried bit line includes metal or doped polysilicon. 
     
     
         14 . The method according to  claim 8 , wherein the forming a contact hole includes etching the insulation film to form a plurality of contact holes arranged an alternating pattern. 
     
     
         15 . The method of  claim 8 , wherein the buried bit line is formed by depositing a conductive material in the second hole, and etching back an upper surface of the conductive material. 
     
     
         16 . The method of  claim 8 , wherein the forming a contact is performed while forming the pillar pattern, and the forming the pillar pattern comprises:
 forming a lower portion of the pillar pattern by growing silicon;   implanting ions into the lower portion of the pillar pattern; and   forming an upper portion of the pillar pattern by growing silicon.   
     
     
         17 . The method of  claim 8 , wherein the forming a contact comprises, after the pillar pattern is formed, implanting ions into a lower portion of the pillar pattern by a vertical ion implantation process.