Transistor formation using cold welding

Abstract

A device and method for fabrication includes providing a first substrate assembly including a first substrate and a first metal layer formed on the first substrate and a second substrate assembly including a second substrate and a second metal layer formed on the second substrate. The first metal layer is joined to the second metal layer using a cold welding process wherein one of the first substrate and the second substrate includes a semiconductor channel layer for forming a transistor device.

1 . A method for fabrication of a semiconductor device, comprising:
 joining a first substrate assembly including a first substrate, a sacrificial layer, a semiconductor layer, and a first metal layer to a second substrate assembly including a second substrate and a second metal layer; wherein the first metal layer is joined to the second metal layer by cold welding; and   removing at least a portion of the sacrificial layer using an etch process, wherein by said removing the sacrificial layer, the first substrate is released from a cold welded assembly of the semiconductor layer, the first metal layer, the second metal layer and the second substrate.   
     
     
         2 . The method as recited in  claim 1 , wherein the joining of the first metal layer to the second metal layer includes cold welding the first and second substrate back-to-back to form a stack of semiconductor components. 
     
     
         3 . The method as recited in  claim 1 , wherein the first substrate and the second substrate are composed of semiconductor materials. 
     
     
         4 . The method as recited in  claim 1 , wherein the semiconductor layer comprises a III-V semiconductor material. 
     
     
         5 . The method as recited in  claim 4 , wherein the semiconductor layer is a monocrystalline material. 
     
     
         6 . The method as recited in  claim 1 , wherein at least one of the first metal layer and the second metal layer includes a textured three-dimensional surface. 
     
     
         7 . The method as recited in  claim 1 , wherein at least one of the first substrate and the second substrate is comprised of silicon, germanium, silicon germanium or a combination thereof. 
     
     
         8 . The method as recited in  claim 1 , wherein at least one of the first substrate and the second substrate that is removed is reusable. 
     
     
         9 . The method as recited in  claim 1 , wherein removing the sacrificial layer includes selectively etching the sacrificial layer. 
     
     
         10 . The method as recited in  claim 1  further comprising forming a transistor using the semiconductor layer as a channel region for the transistor. 
     
     
         11 . The method as recited in  claim 1 , further comprising forming a dielectric layer between the semiconductor layer and the first metal layer. 
     
     
         12 . The method as recited in  claim 10 , further comprising employing the first metal layer joined to the second metal layer as a ground plane of said transistor. 
     
     
         13 . The method as recited in  claim 1 , wherein joining the first metal layer to the second metal layer using a cold welding process includes cold welding at room temperature and atmospheric pressure. 
     
     
         14 . The method of  claim 1 , wherein the sacrificial layer is a semiconductor material. 
     
     
         15 . The method of  claim 1 , wherein said removing said at least a portion of the sacrificial layer using said etch process comprises removing an entirety of said sacrificial layer. 
     
     
         16 . A method for fabrication of a semiconductor device, comprising:
 forming a sacrificial layer over a first substrate, the first substrate comprising a first semiconductor material;   forming a channel layer on the sacrificial layer;   forming a dielectric layer on the channel layer;   forming a first metal layer on the dielectric layer;   cold-welding the first metal layer to a second metal layer formed on a second substrate, the second substrate comprising a second semiconductor material; and   etching to remove the sacrificial layer to expose the channel layer and separate the first substrate from an assembly including the channel layer, the dielectric layer, the first metal layer, the second metal layer, and the second substrate.   
     
     
         17 . The method as recited in  claim 16  further comprising forming a transistor device using the channel layer. 
     
     
         18 . The method as recited in  claim 16 , further comprising: providing a protection layer between the first substrate and the sacrificial layer such that the sacrificial layer is selectively etched relative to the protection layer. 
     
     
         19 . The method as recited in  claim 16 , further comprising employing the first metal layer and the second metal layer as a ground plane. 
     
     
         20 . The method as recited in  claim 16 , wherein cold welding includes cold welding at room temperature and atmospheric pressure.