US2015303255A1PendingUtilityA1

Semiconductor device structures including a rectilinear array of openings

Assignee: MICRON TECHNOLOGY INCPriority: Oct 5, 2012Filed: Jul 1, 2015Published: Oct 22, 2015
Est. expiryOct 5, 2032(~6.2 yrs left)· nominal 20-yr term from priority
Inventors:Dan B. Millward
H10P 76/4085H10P 50/696H10P 50/695H10P 50/692H10W 20/089H10D 62/117H01L 29/0657H01L 21/3086H01L 21/3081H01L 21/3088H10B 12/485
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Claims

Abstract

A method of forming an array of openings in a substrate. The method comprises forming a template structure comprising a plurality of parallel features and a plurality of additional parallel features perpendicularly intersecting the plurality of additional parallel features of the plurality over a substrate to define wells, each of the plurality of parallel features having substantially the same dimensions and relative spacing as each of the plurality of additional parallel features. A block copolymer material is formed in each of the wells. The block copolymer material is processed to form a patterned polymer material defining a pattern of openings. The pattern of openings is transferred to the substrate to form an array of openings in the substrate. A method of forming a semiconductor device structure, and a semiconductor device structure are also described.

Claims

exact text as granted — not AI-modified
1 . A semiconductor device structure, comprising a substrate defining a rectilinear array of openings, each opening of the rectilinear array of openings having substantially the same width of less than or equal to about 25 nm, and adjacent openings of the rectilinear array of openings having substantially the same pitch of less than or equal to about 50 nm. 
     
     
         2 . The semiconductor device structure of  claim 1 , wherein the width of each opening of the rectilinear array of openings is less than or equal to about 15 nm. 
     
     
         3 . The semiconductor device structure of  claim 1 , wherein the pitch between the adjacent openings of the rectilinear array of openings is than or equal to about 30 nm. 
     
     
         4 . The semiconductor device structure of  claim 1 , wherein each opening of the rectilinear array of openings comprises a cylindrical opening. 
     
     
         5 . The semiconductor device structure of  claim 1 , wherein the rectilinear array of openings extends partially into the substrate. 
     
     
         6 . The semiconductor device structure of  claim 1 , wherein the rectilinear array of openings extends completely through the substrate. 
     
     
         7 . The semiconductor device structure of  claim 1 , wherein the rectilinear array of openings comprises rows of openings intersecting columns of openings at about a ninety degree angle. 
     
     
         8 . The semiconductor device structure of  claim 1 , wherein each opening the rectilinear array of openings is at least partially filled with a material. 
     
     
         9 . The semiconductor device structure of  claim 8 , wherein the material comprises a conductive material. 
     
     
         10 . The semiconductor device structure of  claim 1 , wherein the substrate comprises a semiconductive material. 
     
     
         11 . A semiconductor device structure, comprising:
 a substrate exhibiting an array of cylindrical openings at least partially extending therethrough, the array of cylindrical openings comprising:
 at least one row of cylindrical openings, adjacent cylindrical openings of the at least one row of cylindrical openings exhibiting a pitch of less than or equal to about 50 nm; and 
 at least one column of cylindrical openings intersecting the at least one row of cylindrical opening at about a ninety degree angle, adjacent cylindrical openings of the at least one column of cylindrical openings exhibiting a pitch of less than or equal to about 50 nm. 
   
     
     
         12 . The semiconductor device structure of  claim 11 , wherein each cylindrical opening of the at least one row of cylindrical openings is substantially uniformly spaced from each other cylindrical opening of the at least one row of cylindrical openings adjacent thereto. 
     
     
         13 . The semiconductor device structure of  claim 11 , wherein each cylindrical openings of the at least one column of cylindrical openings is substantially uniformly spaced from each other cylindrical opening of the at least one column of cylindrical openings adjacent thereto. 
     
     
         14 . The semiconductor device structure of  claim 11 , wherein a first distance between the adjacent cylindrical openings of the at least one row of cylindrical openings is substantially the same as a second distance between the adjacent cylindrical openings of the at least one column of cylindrical openings. 
     
     
         15 . The semiconductor device structure of  claim 11 , wherein each cylindrical opening of the at least one row of cylindrical openings exhibits a diameter of less than or equal to about 30 nm. 
     
     
         16 . The semiconductor device structure of  claim 11 , wherein each cylindrical opening of the at least one column of cylindrical openings exhibits a diameter of less than or equal to about 30 nm. 
     
     
         17 . The semiconductor device structure of  claim 11 , wherein each cylindrical opening of the at least one row of cylindrical openings and each cylindrical opening of the at least one column of cylindrical openings exhibits substantially the same diameter of less than or equal to about 15 nm. 
     
     
         18 . A semiconductor device, comprising:
 a substrate exhibiting a rectilinear array of openings, the rectilinear array of openings formed by a method comprising:
 forming a template structure comprising parallel features and additional parallel features perpendicularly intersecting the additional parallel features over the substrate to define wells, each of the parallel features exhibiting substantially the same dimensions and relative spacing as each of the additional parallel features; 
 forming a block copolymer material in the wells; 
 processing the block copolymer material to form a patterned polymer material exhibiting a pattern of openings; and 
 transferring the pattern of openings to the substrate. 
   
     
     
         19 . The semiconductor device of  claim 18 , wherein adjacent openings of the rectilinear array of openings are substantially uniformly spaced by less than or equal to about 30 nm. 
     
     
         20 . The semiconductor device of  claim 19 , wherein each opening of the rectilinear array of openings exhibits substantially the same width of less than or equal to about 15 nm.

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