Bonded epitaxial oxide structures for compound semiconductor on silicon substrates

Abstract

A structure includes a handle substrate and an epitaxial oxide layer. The epitaxial oxide layer is bonded directly or indirectly to the handle substrate. Also included is a compound semiconductor layer adjoining and lattice matched to the epitaxial oxide layer.

What is claimed is: 
     
         1 . A structure comprising:
 a handle substrate;   an epitaxial oxide layer, the epitaxial oxide layer being bonded directly or indirectly to the handle substrate, and   a compound semiconductor layer adjoining and lattice matched to the epitaxial oxide layer.   
     
     
         2 . The structure of  claim 1 , wherein the compound semiconductor layer is a group III-V compound layer or a group II-VI compound layer. 
     
     
         3 . The structure of  claim 2 , wherein the handle substrate is a bulk silicon substrate having a silicon oxide layer, the silicon oxide layer adjoining the epitaxial oxide layer. 
     
     
         4 . A structure comprising:
 a germanium base;   one or more compound semiconductor layers adjoining the germanium base, the one or more compound semiconductor layers including a top layer of a desired compound semiconductor material, and   an epitaxial oxide layer adjoining and lattice matched to the top layer.   
     
     
         5 . The structure of  claim 4 , further including an implanted cleavage plane layer within the top layer. 
     
     
         6 . The structure of  claim 5 , further including a silicon substrate, the germanium base comprising a germanium layer on the silicon substrate. 
     
     
         7 . The structure of  claim 6 , wherein the top layer is a zinc selenide layer adjoining the germanium layer, the epitaxial oxide layer adjoining the zinc selenide layer. 
     
     
         8 . The structure of  claim 5 , further including a handle wafer bonded to the epitaxial oxide layer. 
     
     
         9 . The structure of  claim 5 , wherein the one or more compound semiconductor layers comprises a lattice engineered stack of compound semiconductor materials, the lattice engineered stack including a graded layer adjoining the top layer. 
     
     
         10 . The structure of  claim 9 , wherein the one or more compound semiconductor layers are comprised of one or more group III-V materials.