US2015303250A1PendingUtilityA1

Semiconductor Device Having Shallow Trench Isolation and Method of Forming the Same

Assignee: MICRON TECHNOLOGY INCPriority: Apr 16, 2014Filed: Mar 20, 2015Published: Oct 22, 2015
Est. expiryApr 16, 2034(~7.7 yrs left)· nominal 20-yr term from priority
Inventors:Shigeo Ishikawa
H10W 10/0143H10W 10/17H10D 64/513H10D 30/601H01L 21/76229H01L 29/0649H10B 12/09
33
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Claims

Abstract

A device includes a first dielectric film formed in a first trench along a first bottom surface portion and a first side surface portion with leaving a first gap in the first trench and a second dielectric film formed in a second trench along a second bottom surface portion and a second side surface portion with leaving a second gap in the second trench. The first bottom surface portion is covered approximately conformably with a first part of the first dielectric film, the first side surface portion is covered approximately conformably with a second part of the first dielectric film, and the first part is larger in thickness than the second part. The second bottom surface portion is covered approximately conformably with a third part of the second dielectric film, the second side surface portion is covered approximately conformably with a fourth part of the second dielectric film, and the third part is larger in thickness than the fourth part.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor device, comprising:
 a substrate including an upper surface,   a first trench selectively formed in the substrate so that the substrate includes a first bottom surface portion and a first side surface portion extending from the first bottom surface portion to the upper surface, the first trench being defined by the first bottom surface portion and the first side surface portion;   a second trench selectively formed in the substrate so that the substrate includes a second bottom surface portion and a second side surface portion extending from the second bottom surface portion to the upper surface, the second trench being defined by the second bottom surface portion and the second side surface portion, the second trench being formed larger in width than the first trench;   a first dielectric film formed in the first trench along the first bottom surface portion and the first side surface portion with leaving a first gap in the first trench, the first bottom surface portion being covered approximately conformably with a first part of the first dielectric film and the first side surface portion being covered approximately conformably with a second part of the first dielectric film, the first part being larger in thickness than the second part; and   a second dielectric film formed in the second trench along the second bottom surface portion and the second side surface portion with leaving a second gap in the second trench, the second bottom surface portion being covered approximately conformably with a third part of the second dielectric film and the second side surface portion being covered approximately conformably with a fourth part of the second dielectric film, the third part being larger in thickness than the fourth part.   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the substrate further comprises:
 a third trench including a third bottom surface portion and a third side surface portion extending from the third bottom surface portion to the upper surface, the third trench being defined by the third bottom surface portion and the third side surface portion; and   a third dielectric film formed in the third trench along the third bottom surface portion and the third side surface portion with leaving a third gap in the third trench, the third bottom surface portion being covered approximately conformably with a fifth part of the third dielectric film and the third side surface portion being covered approximately conformably with a sixth part of the third dielectric film, the fifth part being larger in thickness than the sixth part.   
     
     
         3 . The semiconductor device according to  claim 2 , wherein the first part of the first dielectric film, the third part of the second dielectric film and the fifth part of the third dielectric film are equal in thickness to each other. 
     
     
         4 . The semiconductor device according to  claim 3 , wherein the second part of the first dielectric film, the fourth part of the second dielectric film and the sixth part of the third dielectric film are equal in thickness to each other. 
     
     
         5 . The semiconductor device according to  claim 3 , wherein a ratio of a thickness of the second part of the first dielectric film to a thickness of the first part of the first dielectric film is equal to or smaller than 0.1. 
     
     
         6 . The semiconductor device according to  claim 3 , wherein the third trench has a third depth and the fifth part of the third dielectric film has a thickness defined between 0.2 to 0.5 times as large as the third depth. 
     
     
         7 . The semiconductor device according to  claim 6 , wherein the first trench has a first depth, the second trench has a second depth and the first depth is smaller than each of the second depth and third depth. 
     
     
         8 . The semiconductor device according to  claim 6 , wherein the first trench has a first depth, the second trench has a second depth and the first depth, the second depth and the third depth are equal to each other. 
     
     
         9 . The semiconductor device according to  claim 2 , further comprising a second isolation films each filling a corresponding one of the first gap, the second gap and the third gap. 
     
     
         10 . The semiconductor device according to  claim 9 , wherein each of the first dielectric film, the second dielectric film, third dielectric film and the second isolation films includes a silicon dioxide film. 
     
     
         11 . The semiconductor device according to  claim 9 , wherein the semiconductor device further comprises third isolation films disposed between the first dielectric film and the second isolation film corresponding to the first dielectric film, between the second dielectric film and the second isolation film corresponding to the second dielectric film and between the third dielectric film and the second isolation film corresponding to the third dielectric film, respectively. 
     
     
         12 . The semiconductor device according to  claim 11 , wherein each of the third isolation films includes a silicon nitride film. 
     
     
         13 . A semiconductor device, comprising:
 a substrate including an upper surface;   a first trench selectively formed in the substrate so that the substrate includes a first bottom surface portion and a first side surface portion extending from the first bottom surface portion to the upper surface, the first trench being defined by the first bottom surface portion and the first side surface portion;   a second trench selectively formed in the substrate so that the substrate includes a second bottom surface portion and a second side surface portion extending from the second bottom surface portion to the upper surface, the second trench being defined by the second bottom surface portion and the second side surface portion, the second trench being formed deeper in depth than the first trench;   a first dielectric film formed in the first trench along the first bottom surface portion and the first side surface portion with leaving a first gap in the first trench, the first bottom surface portion being covered approximately conformably with a first part of the first dielectric film and the first side surface portion being covered approximately conformably with a second part of the first dielectric film, the first part being larger in thickness than the second part; and   a second dielectric film formed in the second trench along the second bottom surface portion and the second side surface portion with leaving a second gap in the second trench, the second bottom surface portion being covered approximately conformably with a third part of the second dielectric film and the second side surface portion being covered approximately conformably with a fourth part of the second dielectric film, the third part being larger in thickness than the fourth part.   
     
     
         14 . A method of forming a semiconductor device, comprising:
 forming a mask film having a first hole pattern and a second hole pattern on an upper surface of a substrate;   forming a first trench at the first hole pattern and a second trench at the second hole pattern in the substrate such that the first trench has a first bottom surface portion and a first side surface portion extending from the first bottom surface portion to the upper surface of the substrate, the second trench has a second bottom surface portion, which is larger in width than the first bottom surface portion, and a second side surface portion extending from the second bottom surface portion to the upper surface of the substrate;   forming a first isolation film to cover an upper surface of the mask film, the first bottom surface portion and the first side surface portion, the second bottom surface portion and the second side surface portion with remaining a first gap in the first trench and a second gap in the second trench, a first part of the first isolation film covering the first bottom surface portion being controlled to be thicker than a second part of the first isolation film covering the first side surface portion, a third part of the first isolation film covering the second bottom surface portion being controlled to be thicker than a fourth part of the first isolation film covering the second side surface portion;   forming a second isolation film on the first isolation film to fill the first gap and the second gap;   removing a part of the second isolation film to expose an upper surface of the mask film.   
     
     
         15 . The method of forming a semiconductor device according to  claim 14 , wherein the first isolation film is formed by HDP-CVD method and the second isolation film is formed by flowable-CVD method or SOD method. 
     
     
         16 . The method of forming a semiconductor device according to  claim 15 , wherein the HDP-CVD method is performed on condition that a ratio of a growth rate to a sputter rate becomes 20 to 40. 
     
     
         17 . The method of forming a semiconductor device according to  claim 14 , further comprising, performing a wet etching the mask film and another part of the second isolation film formed in a higher level of the upper surface of the substrate after removing the part of the second isolation film 
     
     
         18 . The method of forming a semiconductor device according to  claim 14 , wherein forming the first trench at the first hole pattern and a second trench at the second hole pattern in the substrate includes forming a third trench at a third hole pattern of the mask film such that the third trench has a third bottom surface portion which is larger in width than the second bottom surface and a third side surface portion extending from the third bottom surface portion to the upper surface of the substrate. 
     
     
         19 . The method of forming a semiconductor device according to  claim 18 , wherein the third bottom surface portion is covered with a fifth part of the first isolation film and the third side surface portion is covered with a sixth part of the first isolation film, the fifth part and the sixth part being defining a third gap therebetween, the third gap being filled with the second isolation film. 
     
     
         20 . The method of forming a semiconductor device according to  claim 18 , further comprising, forming a third isolation film including a silicon nitride film between the first isolation film and the second isolation film after forming the first isolation film and before forming the second isolation film.

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