Multi-chip modules including stacked semiconductor dice

Abstract

An assembly method that includes providing a first semiconductor device and positioning a second semiconductor device at least partially over the first semiconductor device is disclosed. Spacers space the active surface of the first semiconductor device substantially a predetermined distance apart from the back side of the second semiconductor device. Discrete conductive elements are extended between the active surface of the first semiconductor device and the substrate prior to positioning of the second semiconductor device. Intermediate portions of the discrete conductive elements pass through an aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two of the spacers positioned therebetween. Assemblies and packaged semiconductor devices that are formed in accordance with the method are also disclosed.

What is claimed is: 
     
         1 . A multi-chip module on a substrate having contact areas on a surface thereof, comprising:
 a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate;   a second semiconductor device having a back side;   spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device;   discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between two of the spacers;   a dielectric coating on at least portions of at least one of the discrete conductive elements and the back side of the second semiconductor device, the dielectric coating configured to electrically isolate the discrete conductive elements from the back side of the second semiconductor device; and   an insulative material disposed at least partially between the first semiconductor device and the second semiconductor device.   
     
     
         2 . The multi-chip module of  claim 1 , wherein the spacers comprise at least one of a dielectric material, a tape having an adhesive on each side thereof, a tape coated with thermoplastic material, an adhesive paste, a flowable adhesive, a photocurable material, a thermoplastic material, or a thermocurable material. 
     
     
         3 . The multi-chip module of  claim 2 , wherein at least one of the spacers comprises superimposed, contiguous, mutually adhered materials. 
     
     
         4 . The multi-chip module of  claim 1 , wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 
     
     
         5 . The multi-chip module of  claim 1 , further comprising:
 a third semiconductor device positioned over the second semiconductor device; and   additional spacers interposed between an active surface of the second semiconductor device and a back side of the third semiconductor device.   
     
     
         6 . The multi-chip module of  claim 5 , further comprising:
 peripheral bond pads; and   discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate.   
     
     
         7 . The multi-chip module of  claim 1 , wherein each of the discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between one of a first opening defined between a first set of spacers of the spacers and a second opening defined between a second set of spacers of the spacers. 
     
     
         8 . The multi-chip module of  claim 7 , wherein the first set of spacers is separate from the second set of spacers. 
     
     
         9 . The multi-chip module of  claim 7 , further comprising second discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a third opening defined between a third set of spacers of the spacers. 
     
     
         10 . The multi-chip module of  claim 9 , further comprising third discrete conductive elements extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface between a fourth opening defined between a fourth set of spacers of the spacers. 
     
     
         11 . The multi-chip module of  claim 10 , wherein the third set of spacers is separate from the fourth set of spacers. 
     
     
         12 . The multi-chip module of  claim 1 , further comprising:
 peripheral bond pads positioned on the active surface of the first semiconductor device at a peripheral edge of the first semiconductor device; and   discrete conductive elements electrically connecting the peripheral bond pads to corresponding contact areas of the substrate.   
     
     
         13 . A multi-chip module, comprising:
 a substrate comprising contact areas on a surface thereof;   a first semiconductor device having an active surface including bond pads thereon and an opposing back side affixed to the substrate;   discrete conductive elements, each extending over the active surface of the first semiconductor device from respective bond pads of the bond pads to respective contact areas on the substrate surface;   spacers positioned on the active surface of the first semiconductor device, each spacer of the spacers surrounding a portion of a discrete conductive element of the discrete conductive elements; and   a second semiconductor device superimposed over the first semiconductor device and supported by the spacers.   
     
     
         14 . The multi-chip module of  claim 13 , wherein at least one of the spacers is positioned at a peripheral corner of the active surface of the first semiconductor device. 
     
     
         15 . The multi-chip module of  claim 13 , wherein at least one of the spacers is positioned over at least one bond pad of the bond pads on the active surface of the first semiconductor device. 
     
     
         16 . A multi-chip module comprising:
 a substrate;   a first semiconductor device having an active surface including a central region encompassing bond pads and a back side, the back side affixed to the substrate;   a second semiconductor device having an active surface including bond pads and a back side;   at least four spacers interposed between the active surface of the first semiconductor device and the back side of the second semiconductor device;   first discrete conductive elements extending from the bond pads of the first semiconductor device and to a first contact area on a first side of the substrate, wherein each conductive element extending to the first contact area on the first side of the substrate extends through a first common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers; and   second discrete conductive elements extending from the bond pads of the first semiconductor device and to a second contact area on a second side of the substrate, wherein each conductive element extending to the second contact area on the second side of the substrate extends through a second common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers.   
     
     
         17 . The multi-chip module of  claim 16 , wherein the two spacers defining the first common aperture are separate from the two spacers defining the second common aperture. 
     
     
         18 . The multi-chip module of  claim 16 , wherein every discrete conductive element extending from the bond pads of the first semiconductor device and to the substrate extends through either the first common aperture or the second common aperture. 
     
     
         19 . The multi-chip module of  claim 16 , further comprising third discrete conductive elements extending from the bond pads of the first semiconductor device and to a third contact area on a third side of the substrate, wherein each conductive element extending to the third contact area on the third side of the substrate extends through a third common aperture formed between the active surface of the first semiconductor device, the back side of the second semiconductor device, and two spacers of the at least four spacers. 
     
     
         20 . The multi-chip module of  claim 19 , wherein the third contact area is defined by one of the two spacers defining the first common aperture and one of the two spacers defining the second common aperture.