US2015280005A1PendingUtilityA1

Method for driving semiconductor device

Assignee: SEMICONDUCTOR ENERGY LABPriority: Feb 27, 2009Filed: May 27, 2015Published: Oct 1, 2015
Est. expiryFeb 27, 2029(~2.6 yrs left)· nominal 20-yr term from priority
Inventors:Hajime Kimura
G09G 2300/0842G09G 2310/0262G09G 2300/0861G09G 2320/043G09G 3/3233G09G 2310/0251G09G 2300/0819H10D 30/6721H10D 86/481H10D 86/441H10D 86/423H10D 86/60H10D 30/6715H01L 27/1255H01L 29/78621H01L 27/1225H01L 27/124H01L 2029/7863
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Claims

Abstract

To provide a method for driving a semiconductor device, by which influence of variation in threshold voltage and mobility of transistors can be reduced. The semiconductor device includes an n-channel transistor, a switch for controlling electrical connection between a gate and a first terminal of the transistor, a capacitor electrically connected between the gate and a second terminal of the transistor, and a display element. The method has a first period for holding the sum of a voltage corresponding to the threshold voltage of the transistor and an image signal voltage in the capacitor; a second period for turning on the switch so that electric charge held in the capacitor in accordance with the sum of the image signal voltage and the threshold voltage is discharged through the transistor; and a third period for supplying a current to the display element through the transistor after the second period.

Claims

exact text as granted — not AI-modified
1 . (canceled) 
     
     
         2 . A semiconductor device comprising:
 a transistor comprising:
 a semiconductor layer over a substrate, the semiconductor layer comprising a channel region, a first region and a second region; and 
 a conductive layer over the semiconductor layer with an insulating layer therebetween, the conductive layer overlapping the channel region; 
   a first switch;   a second switch;   a capacitor; and   a display element,   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the display element,   wherein the semiconductor layer comprises an oxide semiconductor,   wherein the first region is between the channel region and the second region, and   wherein an impurity concentration of the first region is lower than an impurity of the second region.   
     
     
         3 . The semiconductor device according to  claim 2 , further comprising a third switch,
 wherein the one of the source and the drain of the transistor is electrically connected to the display element through the third switch.   
     
     
         4 . The semiconductor device according to  claim 2 , further comprising a fourth switch,
 wherein a first terminal of the fourth switch is electrically connected to the gate of the transistor, and   wherein a second terminal of the fourth switch is electrically connected to the other of the source and the drain of the transistor.   
     
     
         5 . The semiconductor device according to  claim 2 ,
 wherein the other of the source and the drain of the transistor is electrically connected to a first wiring,   wherein a second terminal of the first switch is electrically connected to a second wiring, and   wherein a second terminal of the second switch is electrically connected to a third wiring.   
     
     
         6 . The semiconductor device according to  claim 5 , further comprising a fifth switch,
 wherein the other of the source and the drain of the transistor is electrically connected to the first wiring through the fifth switch.   
     
     
         7 . A semiconductor device comprising:
 a transistor comprising:
 a semiconductor layer over a substrate, the semiconductor layer comprising a channel region, a first region and a second region; and 
 a conductive layer over the semiconductor layer with an insulating layer therebetween, the conductive layer overlapping the channel region; 
   a first switch;   a second switch;   a capacitor; and   a display element,   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the display element,   wherein the semiconductor layer comprises an oxide semiconductor,   wherein the semiconductor layer comprises a nanocrystal,   wherein the first region is between the channel region and the second region, and wherein an impurity concentration of the first region is lower than an impurity of the second region.   
     
     
         8 . The semiconductor device according to  claim 7 , further comprising a third switch,
 wherein the one of the source and the drain of the transistor is electrically connected to the display element through the third switch.   
     
     
         9 . The semiconductor device according to  claim 7 , further comprising a fourth switch,
 wherein a first terminal of the fourth switch is electrically connected to the gate of the transistor, and   wherein a second terminal of the fourth switch is electrically connected to the other of the source and the drain of the transistor.   
     
     
         10 . The semiconductor device according to  claim 7 ,
 wherein the other of the source and the drain of the transistor is electrically connected to a first wiring,   wherein a second terminal of the first switch is electrically connected to a second wiring, and   wherein a second terminal of the second switch is electrically connected to a third wiring.   
     
     
         11 . The semiconductor device according to  claim 10 , further comprising a fifth switch,
 wherein the other of the source and the drain of the transistor is electrically connected to the first wiring through the fifth switch.   
     
     
         12 . A television receiver comprising:
 a display portion comprising:
 a pixel comprising:
 a transistor comprising:
 a semiconductor layer over a substrate, the semiconductor layer comprising a channel region, a first region and a second region; and 
 a conductive layer over the semiconductor layer with an insulating layer therebetween, the conductive layer overlapping the channel region; 
 
 a first switch; 
 a second switch; 
 a capacitor; and 
 a light-emitting element, 
 
   wherein a first terminal of the first switch is electrically connected to a gate of the transistor,   wherein a first terminal of the second switch is electrically connected to one of a source and a drain of the transistor,   wherein a first terminal of the capacitor is electrically connected to the gate of the transistor,   wherein a second terminal of the capacitor is electrically connected to the one of the source and the drain of the transistor,   wherein the one of the source and the drain of the transistor is electrically connected to the light-emitting element,   wherein the semiconductor layer comprises an oxide semiconductor,   wherein the first region is between the channel region and the second region, and   wherein an impurity concentration of the first region is lower than an impurity of the second region.   
     
     
         13 . The television receiver according to  claim 12 , further comprising a third switch,
 wherein the one of the source and the drain of the transistor is electrically connected to the light-emitting element through the third switch.   
     
     
         14 . The television receiver according to  claim 12 , further comprising a fourth switch,
 wherein a first terminal of the fourth switch is electrically connected to the gate of the transistor, and   wherein a second terminal of the fourth switch is electrically connected to the other of the source and the drain of the transistor.   
     
     
         15 . The television receiver according to  claim 12 ,
 wherein the other of the source and the drain of the transistor is electrically connected to a first wiring,   wherein a second terminal of the first switch is electrically connected to a second wiring, and   wherein a second terminal of the second switch is electrically connected to a third wiring.   
     
     
         16 . The television receiver according to  claim 15 , further comprising a fifth switch,
 wherein the other of the source and the drain of the transistor is electrically connected to the first wiring through the fifth switch.

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