Display with Multilayer and Embedded Signal Lines

Abstract

A display may have a thin-film-transistor layer with a substrate layer. A layer of dielectric may be formed on the substrate layer and may have an upper surface and a lower surface. The thin-film-transistor layer may include an array of display pixels. Data lines and gate lines may provide signals to the display pixels. Gate driver circuitry in an inactive peripheral portion of the display may include a gate driver circuit for each gate line. The gate driver circuits may include thin-film transistors that are formed on the upper surface of the layer of dielectric. Signal lines such as a gate low line, a gate routing line coupled between the gate driver circuits, and a common electrode line may be formed from two or more layers of metal to reduce their widths or may be embedded within the dielectric layer between the upper and lower surfaces under the thin-film transistors.

1 . (canceled) 
     
     
         2 . A display, comprising:
 upper and lower polarizers; and   a thin-film transistor layer between the upper and lower polarizers, wherein the thin-film transistor layer includes a substrate layer, a rectangular array of display pixels controlled by signals on gate lines and data lines, and thin-film-transistor gate driver circuitry that supplies signals to the gate lines and wherein the thin-film transistor driver circuitry includes a common electrode voltage line formed from a first layer of metal and a second layer of metal.   
     
     
         3 . The display defined in  claim 2  wherein the first layer of metal has a thickness of less than 7000 angstroms and wherein the second layer of metal has a thickness of less than 7000 angstroms. 
     
     
         4 . The display defined in  claim 3  wherein the first and second layers of metal comprise aluminum. 
     
     
         5 . The display defined in  claim 2  wherein the thin-film-transistor gate driver circuit includes a thin-film transistor having a drain conductor and a source conductor. 
     
     
         6 . The display defined in  claim 5  wherein the thin-film transistor gate driver circuitry includes a gate low metal line having first and second layers of metal. 
     
     
         7 . The display defined in  claim 6  wherein the thin-film transistor is located on the substrate layer between the gate low metal line and the common electrode voltage line. 
     
     
         8 . The display defined in  claim 7  further comprising a plurality of gate driver circuits in the gate driver circuitry each of which drives gate signals onto a respective one of the gate lines. 
     
     
         9 . The display defined in  claim 8  further comprising at least one gate routing line that routes signals among the gate driver circuits. 
     
     
         10 . The display defined in  claim 9  wherein the gate routing line comprises a first layer of metal on the substrate and a second layer of metal on the first layer of metal. 
     
     
         11 . The display defined in  claim 10  wherein the gate routing line is interposed between the gate low metal line and the thin-film transistor. 
     
     
         12 . The display defined in  claim 2  further comprising:
 a color filter layer interposed between the upper and lower polarizers; and 
 a layer of liquid crystal material interposed between the color filter layer and the thin-film-transistor layer. 
 
     
     
         13 . A display, comprising:
 upper and lower polarizers; and   a thin-film transistor layer between the upper and lower polarizers, wherein the thin-film transistor layer includes a substrate layer, a rectangular array of display pixels controlled by signals on gate lines and data lines, and thin-film-transistor gate driver circuitry that supplies signals to the gate lines and wherein the thin-film transistor driver circuitry includes a first layer of metal formed on the substrate layer and a second layer of metal formed on the first layer of metal.   
     
     
         14 . The display defined in  claim 13 , wherein the first layer of metal is formed in direct contact with the substrate layer, and wherein the second layer of metal is formed in direct contact with the first layer of metal. 
     
     
         15 . The display defined in  claim 14  wherein the first layer of metal has a thickness of less than 7000 angstroms and wherein the second layer of metal has a thickness of less than 7000 angstroms. 
     
     
         16 . The display defined in  claim 15  wherein the first and second layers of metal comprise aluminum. 
     
     
         17 . The display defined in  claim 13 , wherein the first and second layers of metal form a common voltage electrode line. 
     
     
         18 . The display defined in  claim 17 , further comprising:
 a third layer of metal formed on the substrate layer; and   a fourth layer of metal formed on the third layer of metal.   
     
     
         19 . The display defined in  claim 18 , wherein the third and fourth layers of metal are in direct contact and form a gate low metal line. 
     
     
         20 . The display defined in  claim 13  further comprising:
 a color filter layer interposed between the upper and lower polarizers; and 
 a layer of liquid crystal material interposed between the color filter layer and the thin-film-transistor layer.