Semiconductor device and manufacturing method thereof

Abstract

In order to improve the reliability of a semiconductor device, dummy wiring includes: a first dummy part provided to be spaced apart from and to be parallel to, of a plurality of sides that form a pad, a first side nearest to a corner; and a second dummy part provided to be spaced apart from and to be parallel to, of the sides that form the pad, a second side nearest to an edge side of a semiconductor chip. That is, the dummy wiring is formed by: a first dummy part extending along the first side of the pad; and a second dummy part extending along the second side of the pad.

What is claimed is: 
     
         1 . A semiconductor device comprising:
 a semiconductor chip having a rectangular shape,   wherein the semiconductor chip includes:   (a) a plurality of pads arranged along an edge side of the semiconductor chip; and   (b) dummy wiring provided around, of the pads, a first pad that is arranged at a position nearest to a corner of the semiconductor chip and has a rectangular shape, and   wherein the dummy wiring includes:   (b1) a first dummy part provided to be spaced apart from and to be parallel to a first side nearest to the corner, of a plurality of sides that form the first pad; and   (b2) a second dummy part provided to be spaced apart from and to be parallel to a second side nearest to the edge side of the semiconductor chip of the sides that form the first pad.   
     
     
         2 . The semiconductor device according to  claim 1 ,
 wherein a semiconductor element is formed in the semiconductor chip, and   wherein the dummy wiring is not electrically coupled to the semiconductor element, so that the dummy wiring does not function as wiring.   
     
     
         3 . The semiconductor device according to  claim 2 ,
 wherein a potential of the dummy wiring is in a floating state.   
     
     
         4 . The semiconductor device according to  claim 1 ,
 wherein the dummy wiring is formed in the same layer as that of the first pad.   
     
     
         5 . The semiconductor device according to  claim 4 ,
 wherein a level of a surface of the dummy wiring is the same as that of a surface of the first pad.   
     
     
         6 . The semiconductor device according to  claim 1 ,
 wherein a seal ring, for suppressing a foreign substance from entering inside of the semiconductor chip, is formed between the second dummy part and the edge side of the semiconductor chip.   
     
     
         7 . The semiconductor device according to  claim 6 ,
 wherein a semiconductor element is formed in the semiconductor chip, and   wherein wiring to be electrically coupled to the semiconductor element is not provided between the first pad and the seal ring.   
     
     
         8 . The semiconductor device according to  claim 1 ,
 wherein the first dummy part and the second dummy part are formed integrally with each other.   
     
     
         9 . The semiconductor device according to  claim 8 ,
 wherein the first dummy part and the second dummy part are coupled together by a slant part.   
     
     
         10 . The semiconductor device according to  claim 8 ,
 wherein, while located between the pads and the edge side of the semiconductor chip, the second dummy part extends along the edge side of the semiconductor chip.   
     
     
         11 . The semiconductor device according to  claim 1 ,
 wherein the first dummy part is formed by a plurality of dot patterns, and   wherein the second dummy part is formed by a plurality of dot patterns.   
     
     
         12 . The semiconductor device according to  claim 11 ,
 wherein, while located between the pads and the edge side of the semiconductor chip, the second dummy part extends along the edge side of the semiconductor chip.   
     
     
         13 . The semiconductor device according to  claim 1 ,
 wherein a surface protective film is formed to cover the pads and the dummy wiring, and   wherein an opening, for exposing part of a surface of each of the pads, is formed in the surface protective film.   
     
     
         14 . The semiconductor device according to  claim 13 ,
 wherein a level of the surface protective film covering the dummy wiring is lower than that of the surface protective film covering the first pad, while a level of a surface of the first pad is the same as that of a surface of the dummy wiring.   
     
     
         15 . The semiconductor device according to  claim 13 ,
 wherein the semiconductor chip is sealed by a sealing body including a resin.   
     
     
         16 . A method of manufacturing a semiconductor device comprising the steps of:
 (a) providing a semiconductor substrate including a chip region having a rectangular shape and a scribe region partitioning the chip region; and   (b) forming a plurality of pads each having a rectangular shape along a boundary line between the chip region and the scribe region, and forming dummy wiring around, of the pads, a first pad nearest to a corner of the chip region,   wherein the dummy wiring formed in the step (b) includes:   a first dummy part provided to be spaced apart from and to be parallel to a first side nearest to a corner of the chip region, of a plurality of sides that form the first pad; and   a second dummy part provided to be spaced apart from and to be parallel to a second side nearest to the boundary line, of the sides that form the first pad.   
     
     
         17 . The method of manufacturing a semiconductor device according to  claim 16 , comprising the steps of:
 (c) forming a surface protective film covering the pads and the dummy wiring;   (d) forming an opening for exposing part of a surface of each of the pads in the surface protective film;   (e) after the step (d), acquiring a semiconductor chip by dicing the semiconductor substrate along the scribe region;   (f) after the step (e), coupling a wire to the surface of each of the pads exposed from the opening; and   (g) after the step (f), sealing the semiconductor chip.   
     
     
         18 . The method of manufacturing a semiconductor device according to  claim 17 , comprising the step of:
 after the step (g), performing a heat cycle test.   
     
     
         19 . The method of manufacturing a semiconductor device according to  claim 17 ,
 wherein the step (c) includes the steps of:   (c1) forming a silicon oxide film so as to cover the pads and the dummy wiring; and   (c2) forming a silicon nitride film over the silicon oxide film.   
     
     
         20 . The method of manufacturing a semiconductor device according to  claim 19 ,
 wherein the step (c1) is performed by using a high-density plasma CVD process.