Semiconductor device and manufacturing method thereof

Abstract

A semiconductor device includes a first MOSFET and a second MOSFET that is monolithic-integrated with the first MOSFET on a high-resistance substrate. The first MOSFET includes a first semiconductor layer formed on the high-resistance substrate and a second semiconductor layer formed above the first layer. The second semiconductor layer serves as a well layer of the first MOSFET. The second MOSFET includes a first insulating layer formed on the high-resistance substrate and having a mesa-shape in its upper part, the mesa-shape being formed by being sandwiched between two trenches filled with an oxide film formed in the first semiconductor layer. A second insulating layers formed on the mesa-shape of the first insulating layer and a third semiconductor layer is formed on the second insulating layer, the third semiconductor layer serving as a well layer of the second MOSFET.

1 . A semiconductor device comprising:
 a first MOSFET formed on a high-resistance substrate; and   a second MOSFET that is monolithic-integrated with the first MOSFET on the high-resistance substrate,   wherein the first MOSFET comprises:   a first semiconductor layer formed on the high-resistance substrate; and   a second semiconductor layer formed above the first semiconductor layer, the second semiconductor layer serving as a well layer of the first MOSFET, and the second MOSFET comprises:
 a first insulating layer formed on the high-resistance substrate, the first insulating layer having a mesa-shape in its upper part, the mesa-shape being formed by being sandwiched between two trenches formed in the first semiconductor layer, the two trenches being filled with an oxide film; 
 a second insulating layer formed on the mesa-shape of the first insulating layer; and 
 a third semiconductor layer formed on the second insulating layer, the third semiconductor layer serving as a well layer of the second MOSFET. 
   
     
     
         2 . The semiconductor device according to  claim 1 , wherein the first MOSFET further comprises:
 first and second element separations formed above the first semiconductor layer so as to sandwich the second semiconductor layer therebetween;   first and second diffusion layers formed above the second semiconductor layer, the first and second diffusion layers being apart from each other;   a first gate insulating film formed on the second semiconductor layer located between the first and second diffusion layers; and   a first gate electrode formed on the first gate insulating film, and   the second MOSFET further comprises:
 third and fourth diffusion layers formed above the third semiconductor layer, 
 the third and fourth diffusion layers being apart from each other; 
 a second gate insulating film formed on the third semiconductor layer located between the third and fourth diffusion layers; and 
 a second gate electrode formed on the second gate insulating film. 
   
     
     
         3 . The semiconductor device according to  claim 1 , further comprising a fourth semiconductor layer formed between the high-resistance substrate and the first insulating layer, the fourth semiconductor layer having a smaller specific resistance than that of the high-resistance substrate. 
     
     
         4 . The semiconductor device according to  claim 1 , wherein a trench is formed in the first semiconductor layer formed on the high-resistance substrate of the second MOSFET, the trench being formed so as not to penetrate the first semiconductor layer. 
     
     
         5 . The semiconductor device according to  claim 1 , wherein a trench is formed in the first semiconductor layer formed on the high-resistance substrate of the second MOSFET, the trench being formed so as to reach the high-resistance substrate. 
     
     
         6 . The semiconductor device according to  claim 3 , wherein a trench is formed in the first semiconductor layer formed on the high-resistance substrate of the second MOSFET, the trench being formed so as to penetrate that first semiconductor layer and reach the fourth semiconductor layer.