Fabrication of field-effect transistors with atomic layer doping

Abstract

Field effect transistors fabricated using atomic layer doping processes are disclosed. In accordance with an embodiment of an atomic layer doping method, a semiconducting surface and a dopant gas mixture are prepared. Further, a dopant layer is grown on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C. The dopant layer includes at least 4×10 20 active dopant atoms per cm 3 that react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.

What is claimed is: 
     
         1 . An atomic layer doping method comprising:
 preparing a semiconducting surface;   preparing a dopant gas mixture; and   growing a dopant layer on the semiconducting surface by applying the dopant gas mixture to the semiconducting surface under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C.,   wherein the dopant layer includes at least 4×10 20  active dopant atoms per cm 3  that react with atoms on the semiconducting surface such that the reacted atoms increase the conductivity of the semiconducting surface.   
     
     
         2 . The method of  claim 1 , wherein the dopant layer includes an active p-type atom concentration of at least 1×10 21  atoms/cm 3  as a result of said growing. 
     
     
         3 . The method of  claim 1 , further comprising:
 annealing the dopant layer to increase the number of active dopant atoms in the layer.   
     
     
         4 . The method of  claim 3 , wherein the dopant layer includes an active n-type atom concentration of at least 4×10 20  atoms/cm 3  as a result of said annealing. 
     
     
         5 . The method of  claim 1 , wherein the semiconducting surface has a resistivity of less than 10×10 −4  ohm·cm. 
     
     
         6 . The method of  claim 1 , further comprising:
 mixing the dopant gas with a selective inhibitor to limit the reaction of the dopant gas to the semiconducting surface.   
     
     
         7 . The method of  claim 1 , wherein the dopant atoms of the dopant layer form a common and cohesive lattice structure with the atoms of the semiconducting surface as a result of said growing. 
     
     
         8 . A method for forming a field effect transistor comprising:
 forming a gate structure including a gate dielectric and gate electrode;   fabricating source and drain regions by forming semiconducting material within recesses that are on opposing sides of the gate structure;   applying an atomic layer doping process over at least one of the source and drain regions to form at least one dopant monolayer over at least one of the recesses of the source and drain regions; and   forming a silicide layer over the at least one dopant monolayer to generate a contact to the at least one of the source and drain regions.   
     
     
         9 . The method of  claim 8 , wherein the applying further comprises applying the atomic layer doping process on a channel extension between the gate structure and at least one of the source and drain regions to form at least one dopant monolayer over the channel extension. 
     
     
         10 . The method of  claim 9 , wherein the forming a silicide layer further comprises forming the silicide layer over the channel extension. 
     
     
         11 . The method of  claim 8 , wherein the applying the atomic layer doping process further comprises growing the at least one dopant monolayer by applying a dopant gas mixture to the at least one of the source and drain regions under a pressure that is less than 500 Torr and a temperature that is between 300° C. and 750° C. 
     
     
         12 . The method of  claim 11 , wherein the at least one dopant monolayer includes an active p-type atom concentration of at least 1×10 21  atoms/cm 3  as a result of said growing. 
     
     
         13 . The method of  claim 11 , wherein the applying the atomic layer doping process further comprises annealing the at least one dopant monolayer to increase the number of active dopant atoms in the at least dopant one monolayer and wherein the at least one dopant monolayer includes an active n-type atom concentration of at least 4×10 20  atoms/cm 3  as a result of said annealing. 
     
     
         14 . A field-effect transistor comprising:
 a gate structure including a gate dielectric and gate electrode;   a source region of semiconducting material that is at least partially within a first recess that is connected to the gate structure via a first channel extension;   a drain region of semiconducting material that is at least partially within a second recess that is connected to the gate structure via a second channel extension;   at least one monolayer of dopant material formed in accordance with an atomic layer doping process that is disposed over at least one of the source and drain regions; and   at least one silicide layer that is disposed over the at least one monolayer above at least one of the source and drain regions.   
     
     
         15 . The field-effect transistor of  claim 14 , wherein the at least one monolayer of dopant material is over at least one of the first or second channel extensions. 
     
     
         16 . The field-effect transistor of  claim 14 , wherein the at least one silicide layer is over at least one of the first or second channel extensions. 
     
     
         17 . The field-effect transistor of  claim 14 , wherein the at least one monolayer of dopant material includes an active p-type atom concentration of at least 1×10 21 atoms/cm 3 . 
     
     
         18 . The field-effect transistor of  claim 14 , wherein the at least one monolayer of dopant material includes an active n-type atom concentration of at least 4×10 20  atoms/cm 3 . 
     
     
         19 . The field-effect transistor of  claim 14 , wherein at least one of the first or second channel extensions has a resistivity of less than 10×10 −4  ohm-cm.