US2015234656A1PendingUtilityA1

Vector processor, information processing apparatus, and overtaking control method

Assignee: NEC CORPPriority: Feb 20, 2014Filed: Feb 18, 2015Published: Aug 20, 2015
Est. expiryFeb 20, 2034(~7.6 yrs left)· nominal 20-yr term from priority
G06F 9/3836G06F 9/3834G06F 9/345G06F 9/30043G06F 9/30036
35
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Claims

Abstract

The frequency by which an overtaking process is performed is improved, so that memory access performance is improved. A vector processor 1000 includes an element check unit 123 that calculates a state of bits of a preset number of digits from a least significant digit of an address of a memory, which is accessed by a load instruction or a store instruction, as an element check result, and an overtaking determination unit 122 that performs overtaking determination of a load instruction for a store instruction preceding to the load instruction on the basis of the element check result.

Claims

exact text as granted — not AI-modified
1 . A vector processor comprising:
 an element check unit that calculates a state of bits of a preset number of digits from a least significant digit of an address of a memory, which is accessed by a load instruction or a store instruction, as an element check result; and   an overtaking determination unit that performs overtaking determination of a load instruction for a store instruction preceding to the load instruction on a basis of the element check result.   
     
     
         2 . The vector processor according to  claim 1 , wherein
 the load instruction or the store instruction is an instruction that performs access by a list address, and   the element check unit calculates the element check result by calculating a state of bits of a preset number of digits from a least significant digit of the list address.   
     
     
         3 . The vector processor according to  claim 1 , wherein
 the load instruction or the store instruction is an instruction that performs access at a specific interval from a specific address, and   the element check unit calculates the element check result on a basis of a state of bits of a preset number of digits from a least significant digit of the specific address and a state of bits of a preset number of digits from a least significant digit of a value of the specific interval.   
     
     
         4 . The vector processor according to  claim 1 , wherein
 the preset number of digits is 1, and   the element check unit calculates, as the element check result, whether the address of the memory to be accessed by the load instruction or the store instruction is only an odd address or only an even address.   
     
     
         5 . An information processing apparatus including the vector processor according to  claim 1 , comprising:
 the memory.   
     
     
         6 . An overtaking control method comprising:
 calculating a state of bits of a preset number of digits from a least significant digit of an address of a memory, which is accessed by a load instruction or a store instruction, as an element check result; and   performing overtaking determination of a load instruction for a store instruction preceding to the load instruction on a basis of the element check result.   
     
     
         7 . The overtaking control method according to  claim 6 , wherein
 the load instruction or the store instruction is an instruction that performs access by a list address, and   the element check result is calculated by calculating a state of bits of a preset number of digits from a least significant digit of the list address.   
     
     
         8 . The overtaking control method according to  claim 6 , wherein
 the load instruction or the store instruction is an instruction that performs access at a specific interval from a specific address, and   the element check result is calculated on a basis of a state of bits of a preset number of digits from a least significant digit of the specific address and a state of bits of a preset number of digits from a least significant digit of a value of the specific interval.   
     
     
         9 . The overtaking control method according to  claim 6 , wherein
 the preset number of digits is 1, and   whether the address of the memory to be accessed by the load instruction or the store instruction is only an odd address or only an even address are calculated as the element check result.

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