US2015234295A1PendingUtilityA1
Dynamic patterning method that removes phase conflicts and improves pattern fidelity and cdu on a two phase-pixelated digital scanner
Est. expiryFeb 20, 2034(~7.6 yrs left)· nominal 20-yr term from priority
G03F 7/70283G03F 7/70483G03F 7/70291G03F 7/70466
47
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
Phase conflicts in pattern transfer with phase masks can be resolve by exposing pattern features with a first pattern and a second pattern, wherein the second pattern is selected based on the phase conflicts. In scanned exposures using pulsed lasers, a number of exposures of the second pattern can be less than 20% of a total number of exposures.
Claims
exact text as granted — not AI-modifiedWe claim:
1 . An apparatus, comprising:
a digital phase mask comprising a plurality of independently assignable phase pixels; a pattern generator coupled to the digital phase mask so as to define at least a first phase pattern portion and a second phase pattern portion associated with a pattern feature, wherein the second phase pattern portion is associated with phase conflict in the first phase pattern portion; and an optical system situated to expose a sensitized substrate to the first and second phase pattern portions defined on the digital phase mask.
2 . The apparatus of claim 1 , wherein the optical system includes a pulsed laser, and the first phase pattern portion and the second phase pattern are exposed onto the substrate with N laser pulses and M laser pulses, respectively, wherein M and N are integers, and M is less than N.
3 . The apparatus of claim 2 , wherein M is less than 0.2N.
4 . The apparatus of claim 1 , further comprising a scanning system such that the digital phase mask and the sensitized substrate are scanned with respect to each other, and the optical system provides laser pulses at intervals corresponding to relative scanning of one, two, three, or four phase pixels.
5 . The apparatus of claim 1 , wherein the sensitized substrate is exposed to the first phase pattern portion and then to the second phase pattern portion.
6 . The apparatus of claim 1 , wherein the sensitized substrate is alternately exposed to the first and second phase pattern portions.
7 . The apparatus of claim 1 , wherein the optical system includes a pulsed laser, and the first phase pattern portion and the second phase pattern are exposed onto the substrate with laser pulses having different pulse energies.
8 . The apparatus of claim 1 , wherein the second phase pattern portion is a bridging pattern portion.
9 . A method, comprising:
defining first and second phase patterns on a digital phase mask so as to define a pattern feature on a substrate, wherein the second phase pattern is defined so as to compensate at least one phase conflict; and exposing the substrate to a series of exposures corresponding to the first and second phase patterns, wherein a relative displacement of the digital phase mask and the substrate between exposures corresponds to a dimension of at least one phase pixel of the digital phase mask.
10 . The method of claim 9 , further comprising assigning a first and a second number of exposures to the first and second phase patterns, respectively, and wherein the series of exposures is based on the first and second numbers of exposures.
11 . The method of claim 9 , further comprising exposing the substrate to the first phase pattern and then exposing the substrate to the second phase pattern.
12 . The method of claim 9 , further comprising exposing the substrate to the second phase pattern and then exposing the substrate to the first phase pattern.
13 . The method of claim 9 , further comprising exposing the substrate to the first and second phase patterns with respective series of one or more laser pulses.
14 . The method of claim 9 , wherein the second phase pattern is associated with a bridging pattern feature.
15 . The method of claim 14 , wherein the second phase pattern includes at least two different phases that are assigned to respective pixels of the digital phase mask.
16 . The method of claim 9 , further comprising defining at least three phase patterns on the digital phase mask so as to define the pattern feature on the substrate.
17 . A computer-implemented method, comprising:
selecting a pattern feature for transfer to substrate; assigning at least one phase pattern to the pattern feature, wherein the phase pattern is associated with a phase conflict.
18 . The computer-implemented method of claim 17 , wherein the at least one phase pattern includes a primary phase pattern and a secondary phase pattern, the secondary phase pattern associated with a bridging phase pattern to be situated so as to connect phase pattern portions having first and second phases.
19 . The computer-implemented method of claim 18 , further comprising assigning exposures to the first and second phase patterns.
20 . The computer-implement method of claim 19 , wherein the exposures are assigned as numbers of laser pulses.
21 . The computer-implemented method of claim 19 , wherein the exposures assigned to the first and second patterns are selected to provide a predetermined total exposure in at least one pattern area associated with the phase conflict.
22 . The computer-implemented method of claim 17 , further comprising receiving a pattern layout for at least a portion of a circuit and processing the pattern layout so as to select the pattern feature based on identification of a phase conflict.
23 . The computer-implemented method of claim 17 , wherein the phase pattern is a binary phase pattern.
24 . An apparatus, comprising:
a processor; and at least one computer-readable storage medium, wherein the at least one computer-readable medium includes processor-executable instructions for:
obtaining at least a portion of a circuit pattern;
identifying a phase conflict in at least one pattern feature in the circuit pattern; and
assigning at least first and second phase patterns to the at least one pattern feature.
25 . The apparatus of claim 24 , further comprising a network interface, wherein the at least one computer-readable medium includes processor-executable instructions for obtaining the portion of the circuit pattern via the network interface.
26 . The apparatus of claim 24 , further comprising a network interface, wherein the at least one computer-readable medium includes processor-executable instructions for transmitting the first and second phase patterns via the network interface.
27 . The apparatus of claim 24 , wherein the at least one computer-readable medium includes processor-executable instructions for obtaining the portion of the circuit pattern from the at least one computer-readable medium.
28 . The apparatus of claim 27 , wherein the at least one computer-readable medium is random access memory.
29 . The apparatus of claim 24 , wherein at least one of the first and second phase patterns is associated with a bridging feature in the circuit pattern portion.
30 . The apparatus of claim 24 , wherein the at least one computer-readable medium includes processor-executable instructions for assigning exposures to the first and second phase patterns.Join the waitlist — get patent alerts
Track US2015234295A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.