Semiconductor Constructions and Methods of Planarizing Across a Plurality of Electrically Conductive Posts
Abstract
Some embodiments include a planarization method. A liner is formed across a semiconductor substrate and along posts that extending upwardly from the substrate. Organic fill material is formed over the liner and between the posts. A planarized surface is formed which extends across the posts and across one or both of the liner and the fill material. Some embodiments include a semiconductor construction containing a semiconductor die. Electrically conductive posts extend through the die. The posts have upper surfaces above a backside surface of the die, and have sidewall surfaces extending between the backside surface and the upper surfaces. A liner is across the backside surface of the die and along the sidewall surfaces of the posts. Electrically conductive caps are over the upper surfaces of the posts, and have rims along the liner adjacent the sidewall surfaces of the posts.
Claims
exact text as granted — not AI-modified1 - 34 . (canceled)
35 . A semiconductor construction, comprising:
conductive posts extending through a silicon-containing semiconductor die; the posts having upper surfaces above a backside surface of the die, and having sidewall surfaces extending between the backside surface of the die and the upper surfaces; a liner along the sidewall surfaces of the posts and along the backside surface of the die; the liner being configured to comprise 90 degree angles in transitioning from regions along the sidewall surfaces of the posts to regions along the backside surface of the die; conductive caps directly against the upper surfaces of the posts; the caps having rims that are along sidewall surfaces of the posts and that are spaced from the sidewall surfaces by the liner; the rims having bottom surfaces and being configured to comprise substantially right angles in transitioning from regions of the bottom surfaces to regions along the sidewall surfaces of the posts; and patterned insulative material defining inset regions around the upper surfaces of the posts; and wherein the rims of the caps extend into the inset regions; the insulative material having thick portions adjacent the inset regions and thin portions corresponding to the inset regions; the rims only being along portions of the inset regions so that other portions of the inset regions extend laterally outward beyond the rims; said other portions of the inset regions being between the rims and the thick portions of the insulative material.
36 . The construction of claim 35 wherein the patterned insulative material comprises polyimide.
37 . The construction of claim 35 wherein the liner consists of only one homogenous substance.
38 . The construction of claim 37 wherein the liner consists of silicon nitride.
39 . The construction of claim 35 wherein the liner comprises ruthenium.
40 . The construction of claim 39 wherein the conductive posts comprise copper.
41 . The construction of claim 35 wherein the liner comprises two or more substances.
42 . The construction of claim 35 wherein the conductive caps comprise one or both of nickel and palladium.
43 . A method of forming a semiconductor assembly, comprising:
providing a construction having a plurality of conductive posts that extend into a semiconductor substrate; forming a liner across a surface of the semiconductor substrate, and along sidewall surfaces and top surfaces of the posts; forming fill material over the liner and between the posts, the fill material comprising carbon; forming a planarized surface extending across the fill material, the liner and the posts; after forming the planarized surface, (a) removing the fill material from between the posts while leaving the liner along sidewall surfaces of the posts and across the substrate surface between the posts, and (b) forming patterned insulative material across the liner; the patterned insulative material defining inset regions around planarized upper surfaces of the posts; forming conductive caps within the inset regions and directly against the planarized upper surfaces of the posts and along the sidewall surfaces of the posts; regions of the conductive caps along the sidewall surfaces of the posts being spaced from the sidewall surfaces by the liner; and wherein the liner has one or more pinholes extending therein; and wherein the patterned insulative material fills said one or more pinholes.
44 . The method of claim 43 wherein the patterned insulative material comprises polyimide.
45 . A method of forming a semiconductor assembly, comprising:
providing a construction having a plurality of copper-containing conductive posts that extend into a silicon-containing semiconductor substrate; forming a ruthenium-containing liner across a surface of the semiconductor substrate and along sidewall surfaces and top surfaces of the posts; forming fill material over the liner and between the posts, the fill material comprising carbon; and forming a planarized surface extending across the posts and across one or both of the liner and the fill material.
46 . The method of claim 45 further comprising:
forming conductive material over the planarized surface; and
forming conductive caps on the conductive material; the forming of the conductive caps comprising:
forming a patterned mask over the conductive material;
growing a copper-containing layer over the conductive material within openings that extend through the patterned mask;
forming one or both of nickel and palladium on the copper-containing layer within the openings in the patterned mask; the copper-containing layer together with the one or both of nickel and palladium forming spaced-apart stacks over the conductive material;
removing the patterned mask; and
removing the conductive material from spaces between the stacks.
47 . The method of claim 46 wherein the conductive material comprises titanium and copper.
48 . The method of claim 46 wherein the fill material comprises photoresist.Join the waitlist — get patent alerts
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