Data integrity in memory controllers and methods

Abstract

The present disclosure includes methods, devices, and systems for data integrity in memory controllers. One memory controller embodiment includes a host interface and first error detection circuitry coupled to the host interface. The memory controller can include a memory interface and second error detection circuitry coupled to the memory interface. The first error detection circuitry can be configured to calculate error detection data for data received from the host interface and to check the integrity of data transmitted to the host interface. The second error detection circuitry can be configured to calculate error correction data for data and first error correction data transmitted to the memory interface and to check integrity of data and first error correction data received from the memory interface.

1 . A memory system, comprising: one or more solid state memory devices; and a memory controller coupled to the one or more solid state memory devices by a memory interface, wherein the memory controller includes: a host interface; first error detection circuitry coupled to the host interface; and second error detection circuitry coupled to the memory interface; wherein the first and the second error detection circuitries are configured to detect one or more errors in data transferred across the host interface while the data is in the memory system.