US2015200199A1PendingUtilityA1

Semiconductor memory device and method for manufacturing same

Assignee: TOSHIBA KKPriority: Jan 10, 2014Filed: Mar 11, 2014Published: Jul 16, 2015
Est. expiryJan 10, 2034(~7.4 yrs left)· nominal 20-yr term from priority
H10W 20/43G11C 16/0408G11C 16/0483H10D 62/115H10D 30/693H10D 30/0411H01L 27/11519H01L 21/31111H01L 21/31144H01L 27/11556H10B 41/10H10B 41/27H10B 43/27
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Claims

Abstract

According to one embodiment, a semiconductor memory device includes a substrate, a semiconductor pillar provided on the substrate to extend in a vertical direction, a plurality of first electrode films provided sideward of the semiconductor pillar to extend in a first direction. The plurality of first electrode films are disposed to be separated from each other along the vertical direction. The semiconductor memory device further includes a plurality of second electrode films provided between the semiconductor pillar and the first electrode films. The plurality of second electrode films are disposed to be separated from each other along the vertical direction. The semiconductor memory device further includes a first insulating film provided between the semiconductor pillar and the second electrode films, and a second insulating film provided between the second electrode film and the first electrode film.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A semiconductor memory device, comprising:
 a substrate;   a semiconductor pillar provided on the substrate to extend in a vertical direction;   a plurality of first electrode films provided sideward of the semiconductor pillar to extend in a first direction, the plurality of first electrode films being disposed to be separated from each other along the vertical direction;   a plurality of second electrode films provided between the semiconductor pillar and the first electrode films, the plurality of second electrode films being disposed to be separated from each other along the vertical direction;   a first insulating film provided between the semiconductor pillar and the second electrode films; and   a second insulating film provided between the second electrode film and the first electrode film.   
     
     
         2 . The device according to  claim 1 , wherein
 an equivalent oxide thickness of the first insulating film is thicker than an equivalent oxide thickness of the second insulating film, and   a dielectric constant of the first insulating film is lower than a dielectric constant of the second insulating film.   
     
     
         3 . The device according to  claim 2 , wherein the second insulating film includes:
 a first layer provided on the first electrode film side to cover an upper surface and a lower surface of the first electrode film; and   a second layer provided on the second electrode film side to cover an upper surface and a lower surface of the second electrode film.   
     
     
         4 . The device according to  claim 1 , wherein
 an equivalent oxide thickness of the second insulating film is thicker than an equivalent oxide thickness of the first insulating film, and   a dielectric constant of the second insulating film is lower than a dielectric constant of the first insulating film.   
     
     
         5 . The device according to  claim 4 , wherein the first insulating film is disposed along a side surface of the semiconductor pillar. 
     
     
         6 . The device according to  claim 1 , wherein
 a plurality of the semiconductor pillars are provided,   the plurality of semiconductor pillars is arranged in a matrix configuration along the first direction and a second direction intersecting the first direction as viewed from above,   the first electrode film is not disposed between the semiconductor pillars arranged along the first direction, and   when the semiconductor pillars arranged along the second direction are organized into sets every two mutually-adjacent semiconductor pillars and when two of the first electrode films are positioned between the sets, the first electrode films are not disposed between the two semiconductor pillars belonging to each set.   
     
     
         7 . The device according to  claim 6 , wherein the two semiconductor pillars belonging to the set are formed as one body. 
     
     
         8 . The device according to  claim 6 , wherein a length in the first direction of an end portion of the second electrode film on the semiconductor pillar side is shorter than a length in the first direction of an end portion of the second electrode film on the first electrode film side. 
     
     
         9 . The device according to  claim 6 , wherein an air gap is made in at least one location between the semiconductor pillars, between the first electrode films adjacent to each other in the vertical direction, and/or between the second electrode films adjacent to each other in the vertical direction. 
     
     
         10 . The device according to  claim 1 , wherein the second electrode films are provided around the semiconductor pillar as viewed from above, and the first electrode films are provided around the second electrode films as viewed from above. 
     
     
         11 . The device according to  claim 1 , wherein the second insulating film is not disposed between the first electrode film and the second electrode film for the uppermost level or for a plurality of levels including the uppermost level, and the first electrode film is connected to the second electrode film for the uppermost level or for the plurality of levels including the uppermost level. 
     
     
         12 . The device according to  claim 1 , wherein the second insulating film is divided along the vertical direction for each of the first electrode films. 
     
     
         13 . The device according to  claim 1 , further comprising:
 a cell source line provided between the substrate and the semiconductor pillar to be connected to a lower end of the semiconductor pillar;   a bit line provided on the semiconductor pillar to be connected to an upper end of the semiconductor pillar;   a third insulating film provided between the substrate and the cell source line;   a source region and a drain region formed to be separated from each other in a region of the substrate distal to a region directly under the semiconductor pillar;   a fourth insulating film provided in a region directly above a region of the substrate between the source region and the drain region; and   a gate electrode provided on the fourth insulating film.   
     
     
         14 . A method for manufacturing a semiconductor memory device, comprising:
 forming a stacked body on a substrate by alternately stacking an insulating film and a first film;   making a first trench in the stacked body to extend in a first direction;   making a first recess by causing an exposed surface of the first film at an inner surface of the first trench to recede;   forming a first insulating layer on the inner surface of the first trench;   forming a first conductive film on the first insulating layer;   removing a part of the first conductive film and a part of the first insulating layer located outside the first recess by etching and remaining another part of the first conductive film and another part of the first insulating layer located inside the first recess;   forming a first insulating film on the inner surface of the first trench;   forming a semiconductor film on the first insulating film;   making a second trench in the stacked body between the first trenches to extend in the first direction;   making a second recess by removing the first film via the second trench;   forming a second insulating layer on an inner surface of the second recess;   forming a second conductive film inside the second recess; and   dividing the semiconductor film and the first conductive film along the first direction,   an equivalent oxide thickness of a second insulating film made of the first insulating layer and the second insulating layer being thinner than an equivalent oxide thickness of the first insulating film, a dielectric constant of the second insulating film being higher than a dielectric constant of the first insulating film.   
     
     
         15 . The method according to  claim 14 , further comprising filling an inter-layer insulating film into the first trench after the forming of the semiconductor film and prior to the making of the second trench,
 the making of the first trench including:
 forming a first mask on the stacked body in a line-and-space configuration extending in the first direction; and 
 performing anisotropic etching using the first mask, 
   the dividing of the semiconductor film and the first conductive film along the first direction including:
 forming a second mask on the first mask in a line-and-space configuration extending in a second direction intersecting the first direction; 
 making a through-hole by selectively removing the inter-layer insulating film and the semiconductor film by performing anisotropic etching using the second mask and the first mask; and 
 performing isotropic etching of the first conductive film via the through-hole. 
   
     
     
         16 . The method according to  claim 14 , further comprising forming a second film on a back surface of the first recess after the making of the first recess and prior to the forming of the first insulating layer, the second film being made of a material different from a material of the first film,
 the making of the second recess including removing the first film using the second film as a stopper.   
     
     
         17 . A method for manufacturing a semiconductor memory device, comprising:
 forming a stacked body on a substrate by alternately stacking an insulating film and a first conductive film;   making a first trench in the stacked body to extend in a first direction;   forming a first insulating film on an inner surface of the first trench;   forming a semiconductor film on the first insulating film;   making a second trench in the stacked body between the first trenches to extend in the first direction;   making a recess by causing an exposed surface of the first conductive film at an inner surface of the second trench to recede;   forming a second insulating film on an inner surface of the recess, an equivalent oxide thickness of the second insulating film being thicker than an equivalent oxide thickness of the first insulating film, a dielectric constant of the second insulating film being lower than a dielectric constant of the first insulating film;   forming a second conductive film inside the recess; and   dividing the semiconductor film and the first conductive film along the first direction.

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