US2015188336A1PendingUtilityA1

Circuit and Method for Cell Balancing

Assignee: O2MICRO INCPriority: Feb 8, 2012Filed: Mar 16, 2015Published: Jul 2, 2015
Est. expiryFeb 8, 2032(~5.5 yrs left)· nominal 20-yr term from priority
Inventors:Jingbo Ke
H02J 7/54H02J 7/0021H02J 7/007
33
PatentIndex Score
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Claims

Abstract

A balancing circuit for balancing multiple cells in a battery. The cell balancing circuit includes a first shunt path connected in parallel to a first cell, a controller coupled to the first shunt path, a timer and a storage unit. The controller balances the cells and detects balance conditions of each cell. The timer measures pre-balance times and balance times for each cell. The storage unit stores the pre-balance times and balance times. The controller pre-balances the first cell by enabling the first shunt path for a first pre-balance time and balances the first cell by enabling the first shunt path for a first balance time if an unbalance condition of the first cell is detected by the controller, and updates the first pre-balance time for each balancing cycle based on the first pre-balance time and the first balance time from a previous balancing cycle.

Claims

exact text as granted — not AI-modified
What is claimed is: 
     
         1 . A cell balancing circuit, for balancing a plurality of cells in a battery connected in series, comprising:
 a controller for balancing the plurality of cells and for detecting balance conditions of each cell,   wherein the controller is coupled to a first shunt path, the first shunt path is connected in parallel to a first cell,   wherein the controller pre-balances the first cell by enabling the first shunt path for a first pre-balance time and balances the first cell by enabling the first shunt path for a first balance time if an unbalance condition of the first cell is detected by the controller, and   wherein the controller updates the first pre-balance time for each balancing cycle based on the first pre-balance time and the first balance time from a previous balancing cycle.   
     
     
         2 . The cell balancing circuit of  claim 1 , wherein the controller updates the first pre-balance time of the first cell based on a sum of the first pre-balance time and the first balance time from the previous balancing cycle. 
     
     
         3 . The cell balancing circuit of  claim 1 , wherein the controller is coupled to a second shunt path, the second shunt path is connected in parallel to a second cell, wherein the controller pre-balances the second cell by enabling the second shunt path for a second pre-balance time and balances the second cell by enabling the second shunt path for a second balance time if an unbalance condition of the second cell is detected by the controller, and wherein the controller updates the second pre-balance time for each balancing cycle based on the second pre-balance time and the second balance time from a previous balancing cycle, and wherein the controller further adjusts the first pre-balance time of the first cell and the second pre-balance time of the second cell based on a minimum value between the updated first pre-balance time and the updated second pre-balance time. 
     
     
         4 . The cell balancing circuit of  claim 3 , wherein the controller adjusts the first pre-balance time of the first cell by subtracting the minimum value from the first updated pre-balance time. 
     
     
         5 . The cell balancing circuit of  claim 1 , wherein the controller enables the first shunt path in a plurality of discrete time slots if the first cell is unbalanced, and generates the first balance time by summing up the discrete time slots. 
     
     
         6 . A controller for balancing a plurality of cells connected in series, the controller comprising:
 a timer for measuring balancing time for each cell; and   a control unit for controlling pre-balancing and balancing of each cell according to the cell voltage of each cell and the balancing time measured by the timer,   wherein the controller pre-balances a first cell by enabling a first shunt path connected in parallel to the first cell for a first pre-balance time and balances the first cell by enabling the first shunt path for a first balance time if an unbalance condition of the first cell is detected by the controller.   
     
     
         7 . The controller of  claim 6 , wherein the controller updates the first pre-balance time for each balancing cycle based on the first pre-balance time and the first balance time from a previous balancing cycle. 
     
     
         8 . The controller of  claim 7 , wherein the controller updates the first pre-balance time of the first cell based on a sum of the first pre-balance time and the first balance time from the previous balancing cycle. 
     
     
         9 . The controller of  claim 7 , wherein the controller pre-balances a second cell by enabling a second shunt path connected in parallel to the second cell for a second pre-balance time and balances the second cell by enabling the second shunt path for a second balance time if an unbalance condition of the second cell is detected by the controller, and wherein the controller updates the second pre-balance time for each balancing cycle based on the second pre-balance time and the second balance time from a previous balancing cycle, and wherein the controller further adjusts the first pre-balance time of the first cell and the second pre-balance time of the second cell based on a minimum value between the updated first pre-balance time and the updated second pre-balance time. 
     
     
         10 . The controller of  claim 9 , wherein the controller adjusts the first pre-balance time of the first cell by subtracting the minimum value from the first updated pre-balance time. 
     
     
         11 . A method for balancing a plurality of cells of a battery connected in series, comprising:
 determining a first pre-balance time for a first cell based on the actual operation of the first cell which is evaluated through previous balancing cycles;   pre-balancing the first cell by enabling a first shunt path connected in parallel to the first cell for the first pre-balance time;   monitoring an unbalanced condition of the first cell; and   balancing the first cell by enabling the first shunt path for a first balance time if the first cell is unbalanced.   
     
     
         12 . The method of  claim 11 , further comprising:
 measuring the first balance time of the first cell; and   updating the first pre-balance time for each balancing cycle based on the first pre-balance time and the first balance time from a previous balancing cycle.   
     
     
         13 . The method of  claim 12 , further comprising:
 updating the first pre-balance time by adding up the first pre-balance time of the first cell and the first balance time of the first cell from the previous balancing cycle.   
     
     
         14 . The method of  claim 12 , further comprising:
 pre-balancing a second cell by enabling a second shunt path connected in parallel to the second cell for a second pre-balance time;   monitoring an unbalanced condition of the second cell;   balancing the second cell by enabling the second shunt path for a second balance time if the second cell is unbalanced;   measuring the second balance time of the second cell;   updating the second pre-balance time for each balancing cycle based on the second pre-balance time and the second balance time from the previous balancing cycle; and   adjusting the first pre-balance time of the first cell and the second pre-balance time of the second cell based on a minimum value between the updated first pre-balance time and the updated second pre-balance time.   
     
     
         15 . The method of  claim 14 , further comprising:
 adjusting the first pre-balance time of the first cell by subtracting the minimum value from the first pre-balance time.   
     
     
         16 . The method of  claim 12 , further comprising:
 enabling the first shunt path in a plurality of discrete time slots if the first cell is unbalanced; and   summing up the discrete time slot to generates the first balance time.

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