US2015187645A1PendingUtilityA1
Semiconductor Device Having Non-Planar Interface Between a Plug Layer and a Contact Layer
Est. expiryFeb 22, 2032(~5.6 yrs left)· nominal 20-yr term from priority
Inventors:Yukio Maki
H10W 20/435H10W 20/083H10W 20/056H10W 20/42H10W 20/067H10D 1/716H01L 21/76805H01L 21/76892H01L 21/76883H10B 10/18H10B 10/125
44
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Claims
Abstract
A semiconductor device is provided, in which it becomes easy to reliably couple a plug conductive layer and a wiring layer located over the plug conductive layer to each other and falling of the wiring can be suppressed. The plug conductive layer contacts a source/drain region formed over a major surface of the semiconductor substrate. A contact conductive layer is formed so as to contact both the upper surface and the side surface of the plug conductive layer. Wiring layers are formed over the contact conductive layer so as to be electrically coupled to the contact conductive layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . In a semiconductor device comprising a semiconductor substrate having a major surface provided with a conductive region over which a first interlayer insulating film is formed, a method of electrically connecting the conductive region to a wiring layer comprising:
forming a first hole in the first interlayer insulating film to thereby expose the conductive region; forming a first conductive layer over the first interlayer insulating film such that the first hole is occupied by the first conductive layer; etching back the first conductive layer to form a plug conductive layer in the first hole from the first conductive layer, such that an upper surface of the plug conductive layer is located at a level lower than that of an upper surface of the first interlayer insulating film; forming a second interlayer insulating film over the major surface, including on the upper surface of the plug conductive layer; forming a second hole extending into the second interlayer insulating film and also the first interlayer insulating film, such that second hole overlaps the first hole and exposes a first part of the upper surface of the plug conductive layer and also a side surface of the plug conductive layer; forming a second conductive layer over the major surface such that the second hole is occupied by the second conductive layer and the second conductive layer contacts both the first part of the upper surface of the plug conductive layer and also the side surface of the plug conductive layer, thereby forming an interface that extends in three dimensions relative to the semiconductor substrate; and patterning the second conductive layer so as to form a contact conductive layer and a wiring layer having unitary construction, with the wiring layer protruding from the contact conductive layer in a direction away from the semiconductor substrate.
2 . The method according to claim 1 , comprising patterning the second conductive layer such that the wiring layer has a portion coupled to the contact conductive layer in a region not located directly over the plug conductive layer.
3 . The method according to claim 1 , comprising patterning the second conductive layer such that an entire length of the wiring layer is not located directly over the plug conductive layer.
4 . The method according to claim 1 , comprising patterning the second conductive layer such that, in a cross-section of the semiconductor device:
the wiring layer is over the contact conductive layer; and a width of the wiring layer is less than a width of the contact conductive layer.
5 . The method according to claim 4 , comprising patterning the second conductive layer such that the wiring layer has a portion coupled to the contact conductive layer in a region not located directly over the plug conductive layer.
6 . The method according to claim 4 , comprising patterning the second conductive layer such that an entire length of the wiring layer is not located directly over the plug conductive layer.Join the waitlist — get patent alerts
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