US2015171324A1PendingUtilityA1
Method of manufacturing variable resistance nonvolatile memory device, and variable resistance nonvolatile memory device
Est. expiryJan 19, 2032(~5.5 yrs left)· nominal 20-yr term from priority
H10D 8/60H01L 45/12H01L 45/1608H01L 45/146H10N 70/826H10N 70/24H10N 70/8833H10N 70/041H10N 70/801H10B 63/20H10N 70/828H10N 70/063H10N 70/021
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Claims
Abstract
A method of manufacturing a variable resistance nonvolatile memory device includes: forming, above a substrate, a metal-semiconductor-metal (MSM) diode element; forming a variable resistance element on the MSM diode element; forming a first oxygen barrier layer which covers a side wall of a semiconductor layer of the MSM diode element, and does not cover at least part of a side wall of a variable resistance layer of the variable resistance element; and oxidizing the side wall of the variable resistance layer which is exposed without being covered by the first oxygen barrier layer.
Claims
exact text as granted — not AI-modified1 - 22 . (canceled)
23 . A method of manufacturing a variable resistance nonvolatile memory device, comprising:
forming, above a substrate, a diode element including a semiconductor layer; forming a variable resistance element by stacking, on the diode element, a first electrode, a variable resistance layer, and a second electrode in this order; forming a first oxygen barrier layer which covers a side wall of the semiconductor layer of the diode element, and does not cover at least part of a side wall of the variable resistance layer of the variable resistance element, the first oxygen barrier layer being for preventing the side wall of the semiconductor layer of the diode element from oxidizing; and oxidizing the side wall of the variable resistance layer which is exposed without being covered by the first oxygen barrier layer.
24 . The method according to claim 23 ,
wherein the side wall of the variable resistance layer is insulated in the oxidizing of the side wall of the variable resistance layer.
25 . The method according to claim 23 , further comprising
forming, after the oxidizing of the side wall of the variable resistance layer, a second oxygen barrier layer which covers the side wall of the variable resistance layer.
26 . The method according to claim 25 ,
wherein the second oxygen barrier layer prevents external oxygen from diffusing into the side wall of the variable resistance layer.
27 . The method according to claim 25 ,
wherein the second oxygen barrier layer further covers the first oxygen barrier layer.
28 . The method according to claim 23 , further comprising
forming an interlayer insulating layer to cover the diode element and the variable resistance element.
29 . The method according to claim 23 ,
wherein the variable resistance layer formed in the forming of a variable resistance element includes a first variable resistance layer comprising a first metal oxide, and a second variable resistance layer comprising a second metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide.
30 . The method according to claim 23 ,
wherein the variable resistance layer comprises a transition metal oxide or an aluminum oxide.
31 . The method according to claim 23 ,
wherein the diode element is a metal-semiconductor-metal (MSM) diode element formed by: forming a third electrode above the substrate; forming the semiconductor layer on the third electrode; and forming a fourth electrode on the semiconductor layer.
32 . The method according to claim 31 ,
wherein the first electrode and the fourth electrode are formed as a same electrode which serves as a shared electrode.
33 . A variable resistance nonvolatile memory device comprising:
a substrate; a diode element which is formed above the substrate, and includes a semiconductor layer; and a variable resistance element which is formed on the diode element, and includes a variable resistance layer, wherein the variable resistance element includes: a first electrode; a second electrode disposed opposite the first electrode; the variable resistance layer disposed between the first electrode and the second electrode; and a first oxygen barrier layer which covers a side wall of the semiconductor layer of the diode element, and does not cover at least part of a side wall of the variable resistance layer of the variable resistance element, the first oxygen barrier layer being for preventing the side wall of the semiconductor layer of the diode element from oxidizing, and a region of the side wall of the variable resistance layer of the variable resistance element not covered by the first oxygen barrier layer is insulated.
34 . The variable resistance nonvolatile memory device according to claim 33 ,
wherein the variable resistance element further includes a second oxygen barrier layer which covers the side wall of the variable resistance layer which is oxidized.
35 . The variable resistance nonvolatile memory device according to claim 34 ,
wherein the second oxygen barrier layer prevents external oxygen from diffusing into the side wall of the variable resistance layer.
36 . The variable resistance nonvolatile memory device according to claim 34 ,
wherein the second oxygen barrier layer further covers the first oxygen barrier layer.
37 . The variable resistance nonvolatile memory device according to claim 33 ,
wherein an oxide layer is formed on a surface of the first oxygen barrier layer.
38 . The variable resistance nonvolatile memory device according to claim 33 ,
wherein the variable resistance layer comprises a transition metal oxide or an aluminum oxide.
39 . The variable resistance nonvolatile memory device according to claim 38 ,
wherein the variable resistance layer comprises a transition metal oxide selected from tantalum, hafnium, and zirconium.
40 . The variable resistance nonvolatile memory device according to claim 33 ,
wherein the variable resistance layer of the variable resistance element includes a first variable resistance layer comprising a first metal oxide, and a second variable resistance layer comprising a second metal oxide having a degree of oxygen deficiency lower than a degree of oxygen deficiency of the first metal oxide.
41 . The variable resistance nonvolatile memory device according to claim 33 ,
wherein the diode element is an MSM diode element which includes: a third electrode formed above the substrate; a fourth electrode disposed opposite the third electrode; and the semiconductor layer disposed between the third electrode and the fourth electrode.
42 . The variable resistance nonvolatile memory device according to claim 41 ,
wherein the first electrode and the fourth electrode are a same electrode which serves as a shared electrode.Join the waitlist — get patent alerts
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