US2015171086A1PendingUtilityA1

Selective Growth of a Work-Function Metal in a Replacement Metal Gate of a Semiconductor Device

Assignee: GLOBALFOUNDRIES INCPriority: Oct 17, 2013Filed: Feb 24, 2015Published: Jun 18, 2015
Est. expiryOct 17, 2033(~7.2 yrs left)· nominal 20-yr term from priority
H10P 50/73H10P 50/71H10D 64/013H10D 84/856H10D 84/0193H10D 84/0177H10D 84/85H10D 84/038H10D 64/691H10D 64/667H10D 84/853H01L 29/4966H01L 29/517H01L 27/0924H01L 27/0922
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Claims

Abstract

Approaches for forming a replacement metal gate (RMG) of a semiconductor device, are disclosed. Specifically provided is a p-channel field effect transistor (p-FET) and an n-channel field effect transistor (n-FET) formed over a substrate, the p-FET and the n-FET each having a recess formed therein, a high-k layer and a barrier layer formed within each recess, a work-function metal (WFM) selectively grown within the recess of the n-FET, wherein the high-k layer, barrier layer, and WFM are each recessed to a desired height within the recesses, and a metal material (e.g., Tungsten) formed within each recess. By providing a WFM chamfer earlier in the process, the risk of mask materials filling into each gate recess is reduced. Furthermore, the selective WFM growth improves fill-in of the metal material, which lowers gate resistance in the device.

Claims

exact text as granted — not AI-modified
1 - 15 . (canceled) 
     
     
         16 . A semiconductor device, comprising:
 a p-channel field effect transistor (p-FET) and an n-channel field effect transistor (n-FET) formed over a substrate, the p-FET and the n-FET each having a recess formed therein;   a high-k layer formed within each recess;   a barrier layer formed over the high-k layer within each recess;   a work-function metal (WFM) selectively grown within the recess of the n-FET; and   a metal material formed within each recess.   
     
     
         17 . The device according to  claim 16 , further comprising a metal layer formed over the barrier layer within the recess of the n-FET. 
     
     
         18 . The device according to  claim 16 , further comprising a second barrier layer formed over the WFM within the recess of the n-FET and over the barrier layer within the recess of the p-FET. 
     
     
         19 . The device according to  claim 16 , wherein the high-k layer comprises hafnium oxide, and wherein the barrier layer comprises titanium nitride. 
     
     
         20 . The device according to  claim 16 , the n-FET and p-FET each comprising a fin-shaped FET.

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