High yield substrate assembly

Abstract

High yield substrate assembly. In accordance with a first method embodiment, a plurality of piggyback substrates are attached to a carrier substrate. The edges of the plurality of the piggyback substrates are bonded to one another. The plurality of piggyback substrates are removed from the carrier substrate to form a substrate assembly. The substrate assembly is processed to produce a plurality of integrated circuit devices on the substrate assembly. The processing may use manufacturing equipment designed to process wafers larger than individual instances of the plurality of piggyback substrates.

What is claimed is: 
     
         1 . An article of manufacture comprising:
 a substrate assembly configured for formation of integrated circuit device structures thereon, said substrate assembly comprising:   a plurality of substrates bonded to one another on edges of said plurality of substrates, and   wherein said substrate assembly is configured for use with integrated circuit manufacturing equipment designed to process wafers larger than individual instances of said plurality of substrates.   
     
     
         2 . The article of manufacture of  claim 1  wherein said substrate assembly has a width or diameter of 200 mm or greater. 
     
     
         3 . The article of manufacture of  claim 1  wherein said substrate assembly is rectangular. 
     
     
         4 . The article of manufacture of  claim 1  wherein instances of said plurality of substrates have a generally rectangular shape. 
     
     
         5 . The article of manufacture of  claim 1  wherein instances of said plurality of substrates have a generally non-rectangular shape. 
     
     
         6 . The article of manufacture of  claim 1  wherein bonds between said plurality of substrates comprise nano particles. 
     
     
         7 . The article of manufacture of  claim 1  wherein bonds between said plurality of substrates comprise alumina. 
     
     
         8 . The article of manufacture of  claim 1  wherein bonds between said plurality of substrates are operable to relieve thermal stress across said substrate assembly during said integrated circuit processing. 
     
     
         9 . The article of manufacture of  claim 1  wherein at least one edge of one substrate of said plurality of substrates is not perpendicular to a face of said one substrate. 
     
     
         10 . The article of manufacture of  claim 9  wherein said one edge enhances bonding of said one substrate in comparison to an edge that is perpendicular to a face of said one substrate. 
     
     
         11 . The article of manufacture of  claim 1  wherein said plurality of substrates are from the set of substrates comprising sapphire (c − A1203), Gallium Nitride (GaN), Gallium Arsenide (GaAs), Gallium Phosphide (GaP), Lithium Tantalate (LiTa03), Lithium Niobate (LiNb03), Indium Arsenide (InAs), Indium Phosphide (InP), Silicon Carbide (SiC), and Germanium (Ge). 
     
     
         12 . An article of manufacture comprising:
 a substrate having a surface,   wherein said surface comprises a plurality of structures formed thereon, and   wherein said plurality of structures are operable to relieve thermal stress across said substrate during integrated circuit processing.   
     
     
         13 . The article of manufacture of  claim 12  wherein said plurality of structures interrupt a crystal structure of said surface. 
     
     
         14 . The article of manufacture of  claim 12  wherein said structures comprise substrate material that is characterized as amorphous. 
     
     
         15 . The article of manufacture of  claim 12  wherein said plurality of structures are void of substrate material. 
     
     
         16 . The article of manufacture of  claim 12  wherein said plurality of structures are above said surface of said substrate. 
     
     
         17 . The article of manufacture of  claim 12  wherein said plurality of structures are aligned in a rectilinear pattern on said surface. 
     
     
         18 . The article of manufacture of  claim 12  wherein regions bounded by said plurality of structures comprise polygonal regions. 
     
     
         19 . The article of manufacture of  claim 12  wherein regions bounded by said plurality of structures comprise a plurality of different shapes. 
     
     
         20 . The article of manufacture of  claim 12  wherein said plurality of structures are configured to allow formation of a plurality of integrated circuit devices there between. 
     
     
         21 . The article of manufacture of  claim 12  wherein said substrate is not substantially Silicon. 
     
     
         22 . The article of manufacture of  claim 12  wherein said substrate is from the set of substrates comprising sapphire (crA1203), Gallium Nitride (GaN), Gallium Arsenide (GaAs), Gallium Phosphide (GaP), Lithium Tantalate (LiTaO3), Lithium Niobate (LiNb03), Indium Arsenide (InAs), Indium Phosphide (InP), Silicon Carbide (SiC), and Germanium (Ge).