US2015155325A1PendingUtilityA1

Semiconductor module, mos type solid-state image pickup device, camera and manufacturing method of camera

Assignee: SONY CORPPriority: Jul 30, 2004Filed: Feb 5, 2015Published: Jun 4, 2015
Est. expiryJul 30, 2024(expired)· nominal 20-yr term from priority
H10W 90/734H10W 90/724H10W 74/15H10W 72/9415H10W 72/951H10W 72/923H10W 72/90H10W 72/20H10W 72/9445H04N 25/79H04N 25/00H04N 25/778H04N 25/76H04N 25/77H10F 39/8037H10F 39/809H10F 39/199H10F 39/18H10F 39/014H10F 39/811H10F 99/00H01L 27/14643H01L 27/1464H01L 27/14634H01L 27/14612H01L 27/14636H04N 25/69
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Claims

Abstract

A back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device 32 in which micro pads 34, 37 are formed on the wiring layer side and a signal processing chip 33 having micro pads 35, 38 formed on the wiring layer at the positions corresponding to the micro pads 34, 37 of the MOS solid-state image pickup device 32 are connected by micro bumps 36, 39 . In a semiconductor module including the MOS type solid-state image pickup device, at the same time an image processing speed can be increased, simultaneity within the picture can be realized and image quality can be improved, a manufacturing process can be facilitated, and a yield can be improved. Also, it becomes possible to decrease a power consumption required when all pixels or a large number of pixels is driven at the same time.

Claims

exact text as granted — not AI-modified
1 . A semiconductor module comprising:
 a back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device in which micro pads formed on a wiring layer side at every unit pixel cell or at every cell of a plurality of pixels; and   a signal processing chip in which micro pads are formed on a wiring layer side at positions corresponding to said micro pads of said MOS solid-state image pickup device,   wherein said MOS solid-state image pickup device and said signal processing chip are connected by micro bumps.   
     
     
         2 . A semiconductor module according to  claim 1 ,
 wherein pixel driving micro pads are formed on a region corresponding to the periphery of the pixel region portion of said MOS solid-state image pickup device, and   said pixel driving micro pads are connected to said micro pads on said signal processing chip side through said micro bumps.   
     
     
         3 . A semiconductor module according to  claim 2 ,
 wherein said semiconductor module has an external interface established through ordinary pads of said signal processing chip.   
     
     
         4 . A semiconductor module according to  claim 3 ,
 wherein said MOS solid-state image pickup device includes ordinary test pads.   
     
     
         5 . A semiconductor module according to  claim 2 ,
 wherein said MOS solid-state image pickup device has a cell including:   a photoelectric-converting element;   an amplifying transistor including the gate to receive signal electrical charges from said photoelectric-converting element;   an output line directly or indirectly connected to the source of said amplifying transistor so as to be connected to said micro pads;   a load transistor of which drain is directly or indirectly connected to said output line;   a wiring connected to the source of said load transistor to supply a first voltage;   a reset mechanism for resetting a gate potential of said amplifying transistor; and   a wiring directly or indirectly connected to the drain of said amplifying transistor to supply a second voltage.   
     
     
         6 . A semiconductor module according to  claim 1 ,
 wherein said MOS solid-state image pickup device has a cell including:   a photoelectric-converting element;   an amplifying transistor including the gate to receive signal electrical charges from said photoelectric-converting element;   an output line directly or indirectly connected to the source of said amplifying transistor;   an injection transistor of which drain is directly or indirectly connected to said output line;   a wiring connected to the source of said injection transistor to supply a first voltage;   a reset mechanism for resetting a gate potential of said amplifying transistor;   an activation transistor of which source is directly or indirectly connected to the drain of said amplifying transistor; and   a wiring directly or indirectly connected to the drain of said activation transistor to supply a second voltage.   
     
     
         7 . A semiconductor module according to  claim 6 ,
 wherein said reset mechanism is supplied with a reset pulse, said reset pulse overlapping with a first injection pulse supplied to said injection transistor and said reset pulse being ended before the end of said first injection pulse.   
     
     
         8 . A semiconductor module according to  claim 6 ,
 wherein said cell further includes a transfer transistor of which source is connected to said photoelectric-converting element and whose drain is directly or indirectly connected to the gate of said amplifying transistor, and   a transfer pulse supplied to said transfer transistor is ended before the start of a second injection pulse supplied to said injection transistor.   
     
     
         9 . A semiconductor module according to  claim 1 ,
 wherein said MOS solid-state image pickup device outputs a cell output which is a multiplexed analog signal, and   said analog signal is multiplexed and stored in a memory after digitized by said signal processing chip.   
     
     
         10 . A semiconductor module according to  claim 1 ,
 wherein said MOS solid-state image pickup device outputs a cell output which is a digital signal, and   said digital signal is demultiplexed and stored in a memory by said signal processing chip.   
     
     
         11 . A semiconductor module according to  claim 10 ,
 wherein said cell output is an output which results from further multiplexing a pixel signal after said pixel signal was analog-to-digital converted.   
     
     
         12 . A semiconductor module according to  claim 2 ,
 wherein said MOS solid-state image pickup device does not include a control circuit.   
     
     
         13 . A MOS type solid-state image pickup device comprising:
 a unit pixel cell or a cell having a plurality of pixels including:   a photoelectric-converting element;   an amplifying transistor including the gate to receive signal electrical charges from said photoelectric-converting element;   an output line directly or indirectly connected to the source of said amplifying transistor;   an injection transistor of which drains is directly or indirectly connected to said output line;   a wiring connected to the source of said injection transistor to supply a first voltage;   a reset mechanism for resetting a gate potential of said amplifying transistor;   an activation transistor of which source is directly or indirectly connected to the drain of said amplifying transistor; and   a wiring directly or indirectly connected to the drain of said activation transistor to supply a second voltage.   
     
     
         14 . A MOS type solid state image pickup device according to  claim 13 ,
 wherein said reset pulse supplied to said reset mechanism overlaps with a first injection pulse supplied to said injection transistor, said reset pulse being ended before said first injection pulse is ended.   
     
     
         15 . A MOS type solid-state image pickup device according to  claim 13 ,
 wherein said cell further includes a transfer transistor the source of which is connected to said photoelectric-converting element and of which drain is directly or indirectly connected to the gate of an amplifying transistor, and   a transfer pulse supplied to said transfer transistor is ended before a second injection pulse supplied to said injection transistor is started.   
     
     
         16 . A camera comprising:
 a semiconductor module in which a back-illuminated type MOS (metal-oxide semiconductor) solid-state image pickup device in which micro pads formed on a wiring layer side at every unit pixel cell or at every cell of a plurality of pixels and   a signal processing chip in which micro pads are formed on a wiring layer side at positions corresponding to said micro pads of said MOS solid-state image pickup device,   wherein said MOS solid-state image pickup device and said signal processing chip are connected by micro bumps.   
     
     
         17 . A camera according to  claim 16 ,
 wherein pixel driving micro pads are formed on a region corresponding to the periphery of the pixel region portion of said MOS solid-state image pickup device, and   said pixel driving micro pads is connected to said micro pads of said signal processing chip side through said micro bumps.   
     
     
         18 . A camera according to  claim 17 ,
 wherein said semiconductor module has an external interface established through ordinary pads of said signal processing chip.   
     
     
         19 . A camera according to  claim 17 ,
 wherein said MOS solid-state image pickup device has a cell including:   a photoelectric-converting element;   an amplifying transistor including the gate to receive signal electrical charges from said photoelectric-converting element;   an output line directly or indirectly connected to the source of said amplifying transistor so as to be connected to said micro pads;   a load transistor of which drain is directly or indirectly connected to said output line;   a wiring connected to the source of said load transistor to supply a first voltage;   a reset mechanism for resetting a gate potential of said amplifying transistor; and   a wiring directly or indirectly connected to the drain of said amplifying transistor to supply a second voltage.   
     
     
         20 . (canceled)

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